Shielding ADC with High CMRR?

[Darol Klawetter]

I'm currently laying out a PCB, and I'm thinking that I don't need to shield my 16-bit ADC because it has a differential analog input with a CMRR of 80 dB. I'm wondering if the CMRR will desensitize the input to any expected EMI, which will be common mode because the E-field across the input pin spacing of 0.5mm should be predominantly uniform at expected frequencies. I don't expect any EMI to exceed -60 dBm so 80 dB of CMRR should bury the EMI into the ADC noise floor. Any thoughts? I suppose one problem could be the frequency-dependent degrading of CMRR, though the ADC datasheet doesn't provide an CMRR vs frequency data.

Darol Klawetter

 

[Phil Hobbs]

I'm currently laying out a PCB, and I'm thinking that I don't need to
shield my 16-bit ADC because it has a differential analog input with
a CMRR of 80 dB. I'm wondering if the CMRR will desensitize the input
to any expected EMI, which will be common mode because the E-field
across the input pin spacing of 0.5mm should be predominantly uniform
at expected frequencies. I don't expect any EMI to exceed -60 dBm so
80 dB of CMRR should bury the EMI into the ADC noise floor. Any
thoughts? I suppose one problem could be the frequency-dependent
degrading of CMRR, though the ADC datasheet doesn't provide an CMRR
vs frequency data.

That last point is highly relevant. If it were as amazing as you want
it to be, they'd have trumpeted it to the skies.

Unfortunately, now that datasheets are owned by the marketing
department, you have to read them like Kremlin communiques.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

 

[George Herold]

That last point is highly relevant. If it were as amazing as you want
it to be, they'd have trumpeted it to the skies.

Yeah, I don't know about ADC's, but for instrument amps one finds that the CMRRR drops at ~20dB/decade above some low frequency... I'd guess it follows the open loop gain, but I'm not sure.

The pickup will also depends on the input impedance. (Your -60dBm number is for a 50 ohm input?)

George H.

 

[Darol Klawetter]

Where does the signal ultimately come from? Do you have a differential amp ahead

of the ADC? What's the analog bandwidth and sample rate? How noisy is the

signal itself?



Will the board be in a nice metal box by itself, or is it exposed to nasties?











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The ADC follows a diff amp, whose input is connected to a balun. I'm planning to shield this input circuitry but was wondering if I really needed to extend the shielding to include the ADC. Based on the responses I've received regarding the frequency-dependent nature of CMRR, I'm now inclined to shield the ADC, but I'll first ask the manufacturer if they can provide more detailed CMRR data.

 

[Darol Klawetter]

Yep. CMRR is spec'd at some low frequency where it looks good. Back

in the days when I gave chip design seminars for ICE, I used to enjoy

the faces-turned-white when I reversed the CMRR calculation into

effective common-mode GAIN ;-)



...Jim Thompson

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I love to cook with wine. Sometimes I even put it in the food.

"common mode GAIN" - yikes!

 

[Phil Hobbs]

Yep. CMRR is spec'd at some low frequency where it looks good. Back
in the days when I gave chip design seminars for ICE, I used to enjoy
the faces-turned-white when I reversed the CMRR calculation into
effective common-mode GAIN ;-)

...Jim Thompson

Yup. CMR and PSR are input-referred, so you can easily get gain from
the rail to the output. Another of those traps for young players.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

 

[miso]

CMRR is more a matter of balance (matching) of components, plus knowing
where to cascode devices to improve the spec.

Now it sort of looks like it follows open loop gain only because the
mismatch shows up as a differential signal, which in turn gets amplified
by the open loop gain.

The impedance of the current source feeding a long tail pair is a
classic case where cascoding can improve CMRR simply by not modulating
the current in the long tail pair with the common mode stimulus.

 

[RobertMacy]

I'm currently laying out a PCB, and I'm thinking that I don't need to
shield my 16-bit ADC because it has a differential analog input with a
CMRR of 80 dB. I'm wondering if the CMRR will desensitize the input to
any expected EMI, which will be common mode because the E-field across
the input pin spacing of 0.5mm should be predominantly uniform at
expected frequencies. I don't expect any EMI to exceed -60 dBm so 80 dB
of CMRR should bury the EMI into the ADC noise floor. Any thoughts? I
suppose one problem could be the frequency-dependent degrading of CMRR,
though the ADC datasheet doesn't provide an CMRR vs frequency data.

Darol Klawetter

A lady application engineer from TI presented a seminar session on
'proper' PCB layout. She went from terrible, using two sided board to 4
layer bd, layout bypassing technique etc. each step she'd ask the
attendees, "Is this enough for my 16 bit ADC?" She stopped at what looked
like a rather simple 4 layer PCB layout, that was just done well,
announcing that that layout gave less than 1 LSB noise.

No mention of shielding over the ADC at all.

For what it's worth I've seen unshielded 24 bit ADC's mounted INSIDE a PC!
which demonstrate lower than 1-2LSB's of noise. Tht kind of makes your
problem seem trivial, eh?

 

[Bill Sloman]

A lady application engineer from TI presented a seminar session on 'proper' PCB layout. She went from terrible, using two sided board to 4 layer bd, layout bypassing technique etc. each step she'd ask the attendees, "Is this enough for my 16 bit ADC?" She stopped at what looked like a rather simple 4 layer PCB layout, that was just done well, announcing that that layout gave less than 1 LSB noise.

No mention of shielding over the ADC at all.

When I was working at Cambridge Instruments in the mid-1980's, we up-gradeda bunch of noise-sensitive two layer boards, that had always been fitted with solid aluminium screens under the track side, to four layer boards, with solid 5V and 0V planes on the two inner layers. The artwork changes were minimal - the +15V and -15V rails were still distributed on the outside layers of the board, though the decoupling capacitors were directly coupled toburied 0V ground plane.

Not only could we leave off the aluminium screens but the board-to-board shielding without them was better than it had been with the screened two-layer baords. Obvious enough when you think about it - a buried layer is closerto the tracks that it is shielding than a bolted on screening plate, so all the radiating and receiving dipoles are closer together, and the radiator/receiver aerials are correspondingly shorter and less effective.

<snip>

 

[[email protected]]

A lady application engineer from TI presented a seminar session on

'proper' PCB layout. She went from terrible, using two sided board to 4

layer bd, layout bypassing technique etc. each step she'd ask the

attendees, "Is this enough for my 16 bit ADC?" She stopped at what looked

like a rather simple 4 layer PCB layout, that was just done well,

announcing that that layout gave less than 1 LSB noise.



No mention of shielding over the ADC at all.



For what it's worth I've seen unshielded 24 bit ADC's mounted INSIDE a PC!

which demonstrate lower than 1-2LSB's of noise. Tht kind of makes your

problem seem trivial, eh?

Any kind of modern DA advertised as intended for ADC apps maintains its DC CMRR out to 10MHz, with only negligible degradation of maybe 10-20dB out to1GHz. The problem is the DA is only half the equation, maintaining enough matching of the external analog stuff to any degree of accuracy better thaneven 40dB is a challenge.

 

[[email protected]]

A lady application engineer from TI presented a seminar session on
'proper' PCB layout. She went from terrible, using two sided board to 4
layer bd, layout bypassing technique etc. each step she'd ask the
attendees, "Is this enough for my 16 bit ADC?" She stopped at what looked
like a rather simple 4 layer PCB layout, that was just done well,
announcing that that layout gave less than 1 LSB noise.

No mention of shielding over the ADC at all.

For what it's worth I've seen unshielded 24 bit ADC's mounted INSIDE a PC!
which demonstrate lower than 1-2LSB's of noise. Tht kind of makes your
problem seem trivial, eh?

140dB noise floor? At what frequency (bandwidth)? It's hard to find
audio DACs are much better than 100dB, and that's before you put them
in a real circuit.

 

[Massoud]

I'm currently laying out a PCB, and I'm thinking that I don't need to
shield my 16-bit ADC because it has a differential analog input with a
CMRR of 80 dB. I'm wondering if the CMRR will desensitize the input to
any expected EMI, which will be common mode because the E-field across
the input pin spacing of 0.5mm should be predominantly uniform at
expected frequencies. I don't expect any EMI to exceed -60 dBm so 80
dB of CMRR should bury the EMI into the ADC noise floor. Any thoughts?
I suppose one problem could be the frequency-dependent degrading of
CMRR, though the ADC datasheet doesn't provide an CMRR vs frequency
data.

Darol Klawetter

Sorry for intrusion, I am here to learn. Why your 16 bit ACD has an analog
input CMRR of 80 dB instead of 96 dB? 80 dB doesn't even reach quantization
noise of a 14 bit ADC.

Mass

--- news://freenews.netfront.net/ - complaints: [email protected] ---

 

[Maynard A. Philbrook Jr.]

Sorry for intrusion, I am here to learn. Why your 16 bit ACD has an analog
input CMRR of 80 dB instead of 96 dB? 80 dB doesn't even reach quantization
noise of a 14 bit ADC.

Because it's low end?

Jamie

 

[Glen Walpert]

Because it's low end?

Jamie

Because the unintentional common mode input is supposed to be much
smaller than the intended differential input signal, ideally zero, but
that is not practical so some CMRR is required. To keep the effect of
common mode below quantization noise here the common mode must be at
least 16 dB below the differential signal at whatever frequency CMRR is
specified at, probably more at higher frequencies. A good data sheet
would have CMMR vs frequency data.

Presumably Jamie forgot the smiley, sarcasm may not be what you wanted to
learn about, although this NG is a good place for that .

Regards,
Glen

 

[miso]

We've seen opamps with high-frequency power-supply-rejection gain.

That is generally due to not balancing parasitic capacitance in the
layout. Often chips have dummy devices just to keep the capacitance on
differential nodes balanced so that no common mode signal is induced due
to mismatch in coupling.

There are things in the layout that do not show up in the schematic.
That is what can be tricky in analog design.

I bet you have seen LDOs with power supply gain too. Lots of junky
companies out there making cheap CMOS LDOs with no clue about analog
design. The only thing saving their asses is the capacitance on the LDO
output hides a lot of the bad engineering.

 

[miso]

On 12/18/2013 12:41 PM, Darol Klawetter wrote:

You are far better off measuring the CMRR at high frequency yourself if
you actually care about it.

 

[[email protected]]

Getting 22-23 bits stable requires averaging many samples. Since
delta-sigmas are slow to begin with, the net bandwidth won't be very big.

Sure, but it's assuming a lot to get from 17ish bits S/N to 23 bits
without some extraordinary measures. He was talking about only having
better than 1-2 LSBs of noise "inside a PC", so I guess I assumed this
was a sound card sort of thing. I was asking for more information
about the application. Seems incredible.

 

[Phil Hobbs]

Sure, but it's assuming a lot to get from 17ish bits S/N to 23 bits
without some extraordinary measures. He was talking about only having
better than 1-2 LSBs of noise "inside a PC", so I guess I assumed this
was a sound card sort of thing. I was asking for more information
about the application. Seems incredible.

Nah, you can probably do it by standing on one leg till your brain goes
to sleep.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net