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Sharing vias on decoupling caps

Discussion in 'Electronic Design' started by [email protected], May 16, 2007.

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  1. Guest

    ....or my continuing saga of power supply decoupling on a high speed
    (3.125GBps) PCB.
    The consultant is making us install ~400 caps with about 20 different
    values as power supply decoupling on a board with 4 power planes, so
    ~100 caps/plane. OK, one of his suggestions is to not share vias for
    the caps. I pointed out that the BGA package itself only has about 100
    ground pins. So when you look at the overall picture, aren't vias
    shared anyways since current will flow from the 400 cap vias, through
    the 100 package pins, through the chip, back out the 100 package pins,
    back to the 400 cap vias? No reply yet from the guy.

    I have given up trying to understand the different arguments from the
    different bypass religions out there. As a matter of fact, after this
    project I will divest my shares and sell hot-dogs in a bikini.

    Anyways, comments, insights? I'm burnt out.
  2. Ben Jackson

    Ben Jackson Guest

    I saw a nice report from Analog Devices where they analyzed some filter
    topologies. As I recall, in the tiny cap + via structure, the via is
    almost as important as the cap.

    If you have a BGA package and your caps aren't tiny and lurking on the
    opposite side of the board in amongst the power and ground pins, I'm not
    sure what good 400 of them are going to do you...
  3. John Larkin

    John Larkin Guest

    This consultant guy is clearly in the grips of some progressive brain
    disease. I offered to review the design for you, and our stuff is
    known to work.

  4. Tim Wescott

    Tim Wescott Guest

    Perhaps he charges $100 per cap he recommends, then gets a $1 kickback
    from the cap manufacturer?


    Tim Wescott
    Wescott Design Services

    Posting from Google? See

    Do you need to implement control loops in software?
    "Applied Control Theory for Embedded Systems" gives you just what it says.
    See details at
  5. John Larkin

    John Larkin Guest

    Which, at really high speeds, is the huge low-Z, low-Q
    transmission-line structure formed by the power and ground planes
    themselves. The caps just help with the slow stuff.
    Free, in fact.

    Roger 1,2.

  6. PeteS

    PeteS Guest

    Gotta agree (and yes, I am back at last)

    For the OP - a via through a 2.4 mm (0.1") board is about 1nH or
    thereabouts, as is 0.2 inch of 10 thou track. The parasitics of the
    device are almost as bad.

    As to your
    So when you look at the overall picture, aren't vias shared anyways
    since current will flow from the 400 cap vias, through the 100 package
    pins, through the chip, back out the 100 package pins, back to the 400
    cap vias? No reply yet from the guy.


    Not quite. Current will return through the path of least impedance (real
    important at high speed) which *at* high speed means the path of least
    inductance usually. So the via that is closest to the power/ground pin
    will have the most return current in it.

    Ya know, you can get real advice here for a LOT less than that
    conslutant (not a typo) who does indeed seem in the grip of some brain
    disease, or perhaps terminal currency attraction) if you can filter the
    noise :)


  7. PeteS

    PeteS Guest

    Some clarification

    Return currents will take the lowest energy state return, which (as
    above) is usually the path of lowest inductance at high speed. If you
    need help / review I would suggest John is fully qualified and lower
    cost than your consultant. Of course, I would be willing too (hey, it's

    Bottom line is

    1. Your consultant seems to be full of shit
    2. You need a real high speed expert to review your stuff


  8. Guest

    Given the money involved, why not build a test board and lease a
    network analyzer. I believe I mentioned this in your old thread where
    I had a case that I needed to know the inductance of the bond wires
    and built a test chip to measure it. Each pass of even a moderately
    simple chip is a few hundred $k, so the money was justified.

    On your test board, try a few bypass schemes. Share the vias, don't
    share, spread out the cap values, blah blah blah. You can also try a
    few layouts with the chip in question. That is, not all the support
    circuitry, but just the high speed beast.

    As an aside, generally the chip that takes the least user support
    wins. This includes external components. What invariably happens with
    products that are touchy is the initial product with the problem child
    chip gets out the door, then some time down the line, somebody in
    purchasing changes something and before you know it, the thing doesn't
    work. This even happens in chips. I had a case where the fab changed
    epi vendors and the THD of the chip skyrocketed.
  9. colin

    colin Guest

    more vias = less total inductance, as they are like they are in parallell,
    of course it would be better to have no vias at all - ive tried putting caps
    through holes in the pcb so each end cap is soldered directly to the plane

    I gues the right combination of cap values and trace inductance can give a
    wide spread of series resonances, this would advocate one via per cap.

    Colin =^.^=
  10. PeteS

    PeteS Guest

    I have some interesting pictures of return currents in planes that I'll
    post sometime. For the OP, planes aren't solid layers at this speed -
    they are simply signal layers that happen to have copper between the
    Good for you
    So many call themselves experts - so few are.


  11. What the hell is a "shared via"? Give each cap its own vias?

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