J
john
- Jan 1, 1970
- 0
Hello,
I have following signals coming out of the CPLD
1. Tag
2. Data
3. SCLK ( 3MHz)
4. DCLK ( 1.5MHz)
Please go to the following link to look at the timing relationship of
the above mentioned signals
http://img174.imageshack.us/my.php?image=timingdiagramsy1.png
I am trying to look at these signals using logic analyzer ( HP
1661ES). The logic analyzer offers three different analyzing modes to
look at the signals
1. timing mode
2. state mode
3. State and timing ( both together, timing analyzer gets trigger by
state analyzer)
I want to trigger the logic analyzer in the right way to see the right
results. Can somebody advice me which mode to choose?
Thanks
John
I have following signals coming out of the CPLD
1. Tag
2. Data
3. SCLK ( 3MHz)
4. DCLK ( 1.5MHz)
Please go to the following link to look at the timing relationship of
the above mentioned signals
http://img174.imageshack.us/my.php?image=timingdiagramsy1.png
I am trying to look at these signals using logic analyzer ( HP
1661ES). The logic analyzer offers three different analyzing modes to
look at the signals
1. timing mode
2. state mode
3. State and timing ( both together, timing analyzer gets trigger by
state analyzer)
I want to trigger the logic analyzer in the right way to see the right
results. Can somebody advice me which mode to choose?
Thanks
John