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Sequential Circuit Timing

Discussion in 'General Electronics Discussion' started by Anthony Michaels, Jul 8, 2014.

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  1. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    I'm working on a sequential circuit (256 channels) and my problem is getting each of the channels to send a signal 1 output. The layout consists of 1 master clock (variable from 1Hz to 440Hz), 1 binary (4516) to run the 16 (4067) matrix circuit.

    Here is my main question, when each of the (4067) channels go high, I need to have that channel's pulse preset at a single output.

    I have a circuit that will pull down the "step between", that gives me the duration of that channel, but when I try to "pulse" the (4067) "inhibit" pin to give me a repeat pulse for that channel, I will not get the circuit to see the changing between the next channel in sequence.

    Some notes; when the (4516) runs normal, there is a pulse that will make the (4516) "idol", when it is idol, there is another pulse that will "flash" the (4067)'s "inhibit" input, thus giving me that channels repeat pulse.
     
  2. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    Hi Anthony and welcome to Electronics Point :)

    I can't make much out of your description.

    You have 256 channels, and sixteen 4067 multiplexers? So you are multiplexing 256 different signals onto a single output? Or the other way round?

    You have a single 4-bit counter? That only gives you sixteen different output states.

    What kind of signals are you feeding through the multiplexers?

    Can you start with an overview of what your circuit needs to do, and what it will be used for?
     
  3. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    Kris, this is very complex, it was a design I started back in 71 and have been perfecting it. It's probably so simple I do not see it.

    Ok, Binary counter, the four lines feed all the 4067 chips in parallel. There is a signal pulse that pauses the counter, that is a "manual switch", so when you get to; lets say channel 146, it will pause the binary counter, and you have another counter that starts, as that counter starts you select how long a duration you need, when it reaches that count it un-pauses that binary counter and moves to the next channel in sequence, thus that would be channel 148, BUT!!!! Here's the catch 22, I need the output between channel 146 & 147 to go low. (it's less then 5ms).

    All outputs of the 4067 are daisy chained together and feed though a Schmidt Trigger circuit. The problem I'm baffaled is, I need that pulse to be preset between all the channels. It is there when I am in a special mode. That is, if I feedback the clock to the Schmidt.

    thx for getting back
     
  4. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    I can't visualise the circuit from that description. You really need to post the schematic, and describe what your circuit does, rather than how it does it.
     
  5. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    I'm sorry I can not post a schematic at this time, I work off of memory,notes and mathematic equations on paper.
     
  6. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    OK, well, when you can, we may be able to help.
     
    KJ6EAD likes this.
  7. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    Quick question, what part of my description is unclear?
     
  8. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    Try to imagine that you had no previous knowledge of the circuit - you knew nothing about it, but you knew what each of those ICs does. Now read your description and see whether you would be able to figure out what was being described.
     
  9. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    I understand your point, this is a very complex circuit and to brake it down to basic electronics would not be my objective here. I thank you for your responses and will try to seek answers.
     
  10. KrisBlueNZ

    KrisBlueNZ Sadly passed away in 2015

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    You don't need to break it down into "basic electronics". You just need to describe it clearly and post a schematic. Even a block diagram would help. Otherwise you are wasting the time of anyone who tries to help you.
     
  11. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    I think that the main problem is that with a 4 bit counter you can only have 16 channels.

    Since all the 4067's are being driven in parallel, each one will have the same channel selected.

    So, (assuming the channels start from 0) channels 0, 16, 32, 48, 64, ... are on, then 1, 17, 33, 49, 65, ... then 2, 17, 34, 50, 66, ... all the way up to 15, 31, 47, 63, 79, ...

    At the next clock pulse it goes back to 0, 16, 32, 48, 64, ...

    If you're combining all of these signals then its no wonder you're getting odd results.

    the easiest solution another 4 bit counter cascaded onto the one you have and a 1 of 16 decoder to enable the 4067's one at a time.
     
  12. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    Thanks Steve for the input. 1 binary counter is fine.

    All the outputs from 16 of 4067's (256 total) are all daisy chained with fast acting diodes, tied to ground (470k). From the daisy chain it runs into a small circuit that allows me to produce a single pulse.

    My main problem was getting the "feedback" from the daisy chain circuit to got low between each of the 256 outputs. (there are two modes that I work with on that) one was to pulse the outputs on each of the 256 outputs when in the (idol mode), the other was to "delay" the individual channels output to stay High until the secondary counter would cycle to a set count. (Option to set count to other values)

    I went back to my old studies on Jack Kilby's and re-worked one of his very 1st designs. On his 1st set up design he took a few transistor and "ganged" them, what I did was to change some values between the 3rd and 4th transistors to get the delay I needed.

    The "feedback" delay was what I needed from the final output stage. That was giving me all the problems.

    Within the final stage, that's where I need all the 256 outputs to either pulse in conjunction with the secondary counter, or remain idol until the secondary counter retains it's count and move on. The feedback within that final stage was needed to give me the "turn off" between each of the 256 steps.
     
  13. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    Steve, one thing, I am not getting erratic results, my main focus was the final objective of the circuit. I was the complete circuit working just fine, all the INH, CLK signals are all working in sync with each other.

    Another thing I was worried about was, the timing.
     
  14. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    Yeah, nevertheless, without a circuit diagram we can't tell you any more. I've pointed out some stuff where we need to see the circuit diagram because your explanation doesn't gel with what we have in our heads that tells us what seems to be required.
     
  15. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    Thank you very much for the response, but I do not use schematics or draw them up, only notes are written from memory. I did manage to adjust the circuit to run as I need.
     
  16. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    So, what was the problem?
     
  17. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    The problem was that I'm using 16 (4067) chips and having to get a final pulse to reflect the switching between each of the outputs. There 256 outputs, I needed the end result to have 1 output. At that output it would go low and send that pulse to the final output. The main issue was that I needed some feedback circuit to trigger the final output circuit, representing the change between each of the 256 main outputs of the 4067's. I did manage to come up with the correct timing between each of the outputs from the 4067's and making sure it was in time with the main clock.

    Also there was an issue with the makers of some of the IC's. The best chips I have been working with were made between 1976 and 1983. The new versions of some of the IC's are just plan useless. They are not dependable.

    There is a greater detail in the 1st and 2nd thread I wrote.
     
  18. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    Sorry, I phrased my question poorly. What did you have to do to fix it?

    I've not heard of newer 4000 series chips being anything other than better than older ones.
     
  19. Anthony Michaels

    Anthony Michaels

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    Jul 8, 2014
    Some of todays IC chips have been "restored" from old used boards. Some companies have been buying old unwanted boards and re-stamping, straightening pins and making them look like new. Then tested quickly and sold for "new", or "new old stock"

    Example: I picked up about 50 of the CD4097D series and had a fall out of 10%, that was after a full hour of running a few circuits. 15.25Vdc VCC and at avg. temp of 80 degrees f. Noise levels were erratic. Semiconductors all within 1% total value.

    How I managed to fix the timing problem was to take the input to the binary count and take the 1st stage output of the binary counter and design a feedback circuit to allow for the missing pulse I needed between each output of the 4067.
     
  20. (*steve*)

    (*steve*) ¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd Moderator

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    Yeah, counterfeit devices are a problem. However, I wouldn't use that as an argument that "new versions are just plain useless" :)
     
    KrisBlueNZ likes this.
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