self biased LDO's opamp

[jutek]

hello

i need some help with self biased opamp's LDO

the circuit is here:

1. http://img91.imageshack.us/my.php?image=selfbias6ob.png circuit

it is response on load current step below. as you can see, when load
drops, the regulator doesn't regulate.

2. http://img91.imageshack.us/my.php?image=ldoout8ye.png load response

it's retaled to no bias current in M0 so in opamp as you can see there:

3. http://img91.imageshack.us/my.php?image=m0curr6wv.png M0 current

the problem is how to size transistors to have right current also for
low load conditions. how the bias current in M0 is determined in this
circuit? how to ensure non-zero current during low load?

regards

 

[Ken Smith]

hello

i need some help with self biased opamp's LDO

the circuit is here:

1. http://img91.imageshack.us/my.php?image=selfbias6ob.png circuit

it is response on load current step below. as you can see, when load
drops, the regulator doesn't regulate.

2. http://img91.imageshack.us/my.php?image=ldoout8ye.png load response

it's retaled to no bias current in M0 so in opamp as you can see there:

So, why did you design the circuit so that M0's bias current goes to zero?

Wouldn't you be better off making the M0 current have some minimum value?

You have an awful lot of overshoot and ringing in the servo loop. You
should fix this too. Part of the unregulated problem is that the overshoot
voltage gets "trapped" when the gain drops to zero.

When the M0 current goes to zero, your whole circuit is shut down. There
is nothing you can do about it without making something pass current in
that case. The easiest thing, I think, would be to add something in
parallel with M0 to make the idle current flow there.

If your V1 is a fixed voltage, you may want to bring that into this added
circuit to make the idle current constant.

 

[Genome]

hello

i need some help with self biased opamp's LDO

the circuit is here:

1. http://img91.imageshack.us/my.php?image=selfbias6ob.png circuit


regards

I've spent some time looking at that.... I've seen many of your posts.

I don't know how you manage to do it or why you do it but I'd like to know
what the purpose of coming up with shit circuits and asking shit questions
about them is?

Do you wish to claim that it is, in fact, someone elses circuit and they
have asked you to analyse it.

The simple answer is it is shit. Obviously they know it is shit but, being
sad types, thought they would make it up and 'ask the student'.

Ho ho ho, what jolly fun.

DNA