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self biased LDO

Discussion in 'Electronic Basics' started by jutek, May 13, 2006.

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  1. jutek

    jutek Guest


    i need some help with self biased opamp's LDO

    the circuit is here:

    1. circuit

    it is response on load current step below. as you can see, when load
    drops, the regulator doesn't regulate.

    2. load response

    it's retaled to no bias current in M0 so in opamp as you can see there:

    3. M0 current

    the problem is how to size transistors to have right current also for
    low load conditions. how the bias current in M0 is determined in this
    circuit? how to ensure non-zero current during low load?

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