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(Seemingly) simple op-amp question

Discussion in 'Electronic Basics' started by Jon, Jan 24, 2004.

  1. Jon

    Jon Guest

    The circuit shown here:

    http://www.benchmarkmedia.com/pdf/panpot.pdf

    says that the total gain to one of the outputs will be .707 times the
    normal gain when the pot is in the extreme position. Is this correct?

    According to my calculations, the 4.87k, 10k, and 2k make a voltage
    divider (because the input impedance of the inverting amplifier is
    2k), which is (|| = in parallel with):

    (10k || 2k)
    ------------------- = .255
    (10k || 2k) + 4.87k

    for the center position, it is:

    (5k || 2k)
    ------------------- = .226
    (5k || 2k) + 4.87k


    since .255 * .707 = .180, the gain ratio of .707 (-3 dB) seems
    incorrect.

    the gain of the inverting amplifier is 11.8k/2k = 5.9, which,
    multiplied by the voltage divider is 1.5 and 1.339, for the two
    configurations. right?

    If you ignore the input impedance of the amplifier, the values are
    then:

    10k
    ----------- = .672
    10k + 4.87k

    and

    5k
    ---------- = .506
    5k + 4.87k

    and the total gains are 3 and 4, which are a ratio of .75 apart, which
    is much closer. but does this mean that they forgot to include the
    input impedance, or that i am in the wrong by including it?
     

  2. Right. Your calculations above are correct. The DC gains when the pot is at
    the extremes and in the centre position are 1.5043 and 1.3382, respectively.
    I don't know why the PDF says 1 and 0.707... Unless there's something else
    we're overlooking...

    cheers,
    Costas
    _________________________________________________
    Costas Vlachos Email:
    SPAM-TRAPPED: Please remove "-X-" before replying
     
  3. Tim Dicus

    Tim Dicus Guest

    Hi Costas,

    There is one minor thing you overlooked. The circuit is operating at 346KHz. I think it is the AC gain they are looking for. You
    must compensate for the capacitive impedance of the 39pf cap (about 12K at 346KHz). So you are looking at a parallel reactance of
    about 7800 ohms with about a 45 degree phase shift on the feedback circuit.

    So it looks to me without doing exact calculations, that the gain will be somewhere between .707 and 1 with the frequency at 346KHz.

    I am unable to do the exact numbers now because I must depart soon for "real work". Hopefully someone will finish this in the next
    several hours.

    Hope that helps and see ya later !^),

    Tim
     
  4. Something wrong, here. In one extreme position, the output goes to
    zero. In the other the output must be greater than when the pot is
    centered. This cannot be a fractional multiple of the centered
    output.
    Remember that the input of an inverting opamp is a virtual ground, so
    you can figure the input signal as a current entering that ground.
    The output is then, that current passing through the feedback
    resistor. If you figure an input of 1 volt, then the gain is the
    drop across the feedback resistor.

    So, for the pot at 10k, and a 1 volt input, the current arriving at
    the - input is:

    Solving for the voltage across the 2K resistor:

    1 volt * (2k || 10k) / (4.87k + (2k || 10k) = .255 volt

    So the current to the inverting node is .25 volt / 2k = .1275 ma.

    This causes a drop in the feedback resistor of:

    ..127 ma * 11.8K = 1.504 volts

    For a gain of 1.504

    Repeating for the pot at center:

    Solving for the voltage across the 2K resistor:

    1 volt * (2k || 5k) / (4.87k + (2k || 5k) = .227 volt

    So the current to the inverting node is .227 volt / 2k = .1134 ma

    This causes a drop in the feedback resistor of:

    ..1134 ma * 11.8K = 1.338 volts

    For a gain of 1.338

    So the gain ratio from full to center is 1.504/1.338=1.124

    If they got the ratio upside down it would be 1.338/1/504=.89

    I think they screwed up.
     
  5. 346KHz. I think it is the AC gain they are looking for. You
    346KHz). So you are looking at a parallel reactance of
    somewhere between .707 and 1 with the frequency at 346KHz.
    "real work". Hopefully someone will finish this in the next

    I see your point, but I don't think this is it... The circuit is meant for
    audio signals and the filter cut-off is way too high to affect the output.
    The pF caps are only there to limit the gain at very high frequencies and
    are not meant to affect the actual audio signals going through.

    Probably a mistake on their part. Replacing the 11.8k resistors with 7.87k
    ones gives the more sensible gains of 1.00 and 0.89.

    cheers,
    Costas
     
  6. Tim Dicus

    Tim Dicus Guest

    Hi Costas,

    You are correct. If it is an audio amp, the values were not correct. The 7800 ohm resistor should produce about the correct gain for
    audio range. I see now the frequency designation in the upper right corner is Fc (cutoff), not Fo (center). My bad. Been working
    with PLLs to long I guess. I see what I want to see.

    Tim
     
  7. Jon

    Jon Guest

    ok good. i thought it was a mistake, but the .707 (= 3dB) difference
    was what i was trying to get in another circuit, and it was very
    confusing.

    thanks everyone.
     
  8. Balaji

    Balaji Guest

    Hey, these guys have screwed it up completely. There is simply nothing
    that they have written, do I find conforming to their circuit design
    there.
    I look at the Thevenin equivalent from terminal 2 leftwards. Assume
    extreme position first:

    Rth = 2K + (4.87K||10K) ~ 5.275K
    Vth = Vin * 10 / (10 + 4.87) ~ 0.6724 Vin
    Gain of inverter = 11.8K/Rth ~ 2.2369
    Vth * Gain of inverter = Output ~ 1.5043 Vin

    The other side is zero.

    Again for middle position, we have

    Rth = 2K + (4.87K||5K) ~ 4.467K
    Vth = Vin * 5 / (5 + 4.87) = 0.5065
    Gain of inverter = 11.8K/Rth ~ 2.64155
    Vth * Gain of inverter = Output ~ 1.33872

    If you see, none of these numbers is even remotely related to 0.707.
    There is surely something wrong. I have a feeling this was first
    designed just like that by a beginner and was not even tested before
    publishing it online.

    And about that fc = 346KHz, you get that by taking (1/(2pi * 11.8K *
    39p)). Very funny to note that someone tried to use this configuration
    for having some cutoff frequency! God knows where we get any 3 dB down
    signals. The bandwidth of the inverter is limited to 346KHz, and the
    input is in audio range!! Makes no real sense to me.
     
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