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RS232?

Discussion in 'Electronic Design' started by Myauk, Oct 9, 2006.

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  1. Myauk

    Myauk Guest

    Hi everyone,

    I am still confusing with RS232 transmission and receiving algorithm
    practically.

    Does anyone has a practical application example with circuit design
    concepts.

    I just do not understand how the receiving circuit knows which bit is
    start bit and which bit is stop bit.

    What if, it interprets the bit stream wrongly. I have read the several
    articles but because of my weakness to figure out the whole system in
    clear conceptions, more straight forward explanation on the design of
    practical RS 232 transmission and receiving circuit design.

    For example, let us suppose that I am going to design a secuity system.
    The system would consists of a Key Pad, a circuit that converts the key
    in's into ASCII characters, a parallel to serial converter, then what??

    Regards
     
  2. Tam/WB2TT

    Tam/WB2TT Guest

    First, the two ends have to be set up for the same format; say 8 data bits,
    no parity, 2 stop bits. The system is normally in MARK hold. So, the first
    SPACE that comes along is assumed to be the start bit. It then assumes the
    next 8 bits are data, and now looks for 2 stop bits. If it does not see two
    (or more) stop bits, it now tries again, by slipping the phase 1 bit.

    This is just one possible example, different UARTs would use a different
    algorithm, but in the end they all go into a state where thay recognize a
    start bit, n data bits, and m stop bits. A real transmission facility will
    have errors; so, you have to allow for missing start and stop bits without
    re synchronizing immediately.

    Tam
     
  3. mkaras

    mkaras Guest

    Myauk:
    The solution you should be looking at is a cheap microcontroller.
    Connect the keypad signals to the microcontroller port pins, provide
    some simple firmware to scan the pins and interpret the key pad switch
    presses. And then stuff codes for the detected keys into the UART on
    the microcontroller. Let that format and take care of the serial data
    transmission. The low cost microcontroller can be had for less than 1
    USD in production quantities and will most likely be less cost and use
    way less PC board space than trying to do some old fashioned discrete
    logic design to implement the circuit. Its 2006 by gosh.
    - mkaras
     
  4. Guest


    MAX232?
     
  5. Myauk

    Myauk Guest

    Quite close to my requirement!

    I know that I can do RS232 interfacing very well referring to the
    applicaition notes supplied for MAX 232, UARTS, Microcontrollers, etc.

    But the reason I ask this question is that I just want to imagine the
    big picture of the conception in every details.

    Thanks Tam/WB2TT
     
  6. PeteS

    PeteS Guest

    RS232 asynchronous signalling uses the concept of data framing.

    In an asynchronous frame, the start bit is a logical 0, and the stop
    bit is a logical 1. The number of bits between those points varies (as
    noted earlier).

    A UART receiver in idle (line is logical 1, or _MARKING_ as it was
    known, from mark/space terminology) sits around and waits for the line
    to go low. In the simplest form, a low indicates a start bit (we
    normally qualify this against a 16x clock in current UARTs).

    As both ends have already 'agreed' on the data rate and format (or they
    should have), the next bit is the LSbit of the data. The data are
    asserted at each bit time by the transmitter. After the data is the
    [optional] parity bit, followed by a stop bit.

    When a stop bit is not detected at the _expected_ position we assert a
    'Framing Error' (see your nearest UART datasheet for an example).

    A transmission of multiple data words (which can be 5-8 bits) is
    separated at a minimum by the number of stop bits selected (again, see
    a UART datasheet).

    Let's assume we're going to transmit 2 consecutive data words and we
    have set the frame as

    8 data bits, 1 stop bit, no parity and the transmitter actually has
    both in a buffer (or we can refill the buffer before the last bits are
    out)

    Then what you'll see should be:

    Low (start) for 1 bit time, 8 data, High (stop) for 1 bit time, Low
    (start) for 1 bit time, 8 data, High (stop) for 1 bit time, High (idle)
    until next bit.

    You won't (obviously) see a transition after the last stop bit as it is
    the same as an idle line.

    Cheers

    PeteS
     
  7. Guest

    I am still confusing with RS232 transmission and receiving algorithm
    You could use PLL or oversampling to receive bits.
    (Comments on this anyone else?)
    Synchronise at idle. Ie if signal is "quiet" for more than 10 bit-times then
    you know where things start out.
    Do you want the theory or do you want a pragmatic solution?
    As for solution any mcu would proberbly solve your problem in one go.
    Wire keyboard in a matrix to an mcu, then for every activated X scan Y. Then
    let the builtin uart take care of bit banging. And when you are just sending
    things are so much easier.. (receiver is the one stuck with flank sync :)
     
  8. David Brown

    David Brown Guest

    Close, although virtually no UARTs look beyond the first half of the
    incoming stop bits. The other half (2 stop bits is rare) is just for
    spacing, and is ignored by the receiver.
     
  9. Myauk

    Myauk Guest

    Thanks PeteS

    Now I have got a starting point.

    The main reason is that I have no project to do with UARTs yet.

    I have done something in the past but I have spent less time with
    interfacing compared to power electronics (especially inverters and UPS
    systems).

    However I intend to design auto shut down scheme for a typical UPS
    system.

    I am going to connect the COM Port and send a shut down signal to
    Desktop Computer when the battery in the system is low and there is no
    more mains input votage to recharge the battery.

    I would not need a UART, I think. I would need a comparator to signal
    the COM port of the Desktop computer, and additional circuit to detect
    the computer has properly shut down and stop functioning the whole UPS
    system except the battery charger.

    Do you have any suggestions for such system?

    I think I would need to understand more about the working scheme of the
    COM port in Desktop PCs and the shut down scheme of the OS (Microft
    Windows, and sometimes Linux).

    Regards



     
  10. jasen

    jasen Guest

    Start with a quiet line... (this is the same voltage as the stop bit)

    first comes the start bit (opposite voltage)
    and the the other bits (equally spaced and at a pre-determined rate)
    after counting in n data bits (usually n=8) it expects the stop bit
    that can happen if you don't start with a quiet line,
    eventually though synchronisation will come back.

    or if it's expecting the wrong bit rate (which is harder to correct for)
    rs232 line driver eg:(MC1488 or MAX232)

    it may be easier to use a small microcontroller for the keypad to serial
    conversion and then the line driver chip.

    Bye.
    Jasen
     
  11. jasen

    jasen Guest

    There'll be voltage on the serial port's output pins while
    the computer is operating.

    The computer is capable of detecting a change on the CD, CTS, DSR , RI
    , and RXD pins, only RXD is used for serial signalling, the other 4 inputs
    can be used to indicate the state of the UPS.
    Shutdown is done by the operating system, ( In linux you invoke runlevel 6
    by the command "init Fail" when the power goes off and "init Low"
    when the battery is low, and "init OK" if the power comes back before
    shutdown )

    Reading the serial port is also operating-system specific

    RI can be used to cause a startup (if you enable "wake on ring" in the BIOS
    config)

    Bye.
    Jasen
     
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