I'm not sure what they're referring to. The PIC uses the modified Harvard architecture, where the program memory and the data memory use separate address and data buses, so two different locations can actually be accessed simultaneously during normal program execution: the program memory where the instruction opcode is stored, and the data memory address where the RAM variable or SFR (special function register) is located. But that's different from accessing "two addresses in program memory automatically".
They may be referring to the fact that the data bus for the program memory on the PIC16F877A (which is a standard "mid-range" PIC device) is actually 14 bits wide, not the more traditional 8 bits wide (the data memory is 8 bits wide). So to specify an opcode on the PIC16F877A, you need four hexadecimal digits, and every time the core reads an instruction opcode, you could say it is reading two bytes from the program memory. That's not actually true; it reads a single program memory location, but it gets 14 bits from it, rather than the more traditional 8 bits.
They might also be referring to multi-word instructions, where the instruction occupies two adjacent program memory locations, but the PIC16F877A does not have any multi-word instructions.
If you can quote the exact wording and include some context, we may be able to explain better.
