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Regd: MOS Transistor basics help

Discussion in 'Electronic Basics' started by Kranthi Q, Oct 15, 2004.

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  1. Kranthi Q

    Kranthi Q Guest

    Hi

    I need some help in understanding the difference between -

    Gate Length

    Gate width

    Channel Length

    Channel Width

    Channel Depth

    Depletion Layer Width

    Depeltion Layer length

    for a MOS transistor. WHich of these quantities are equal and how are
    they efected by threshold voltage and gate voltage. I am confused as
    to especially w.r.t depth and width.

    Help is appreciated.

    Kranthi.
     
  2. peterken

    peterken Guest

    All of your parameters refer to the physical dimensions of the fet at
    silicon level, they are defined at the manufacturing process
    All of them refer to what they stand for, seen in a 3-D manner.
    Width = how wide is it
    Length = how long is it
    Depth = what's the thickness of the given layer
    Look at the parameters as a lying down rectangle with a specific thickness

    None is affected by threshold voltage and gate voltage, in fact it's the
    other way around, the physical dimensions at silicon level affect these
    parameters.

    None of them you can have any influence on, whatever you try, since it's a
    mechanical fact



    Hi

    I need some help in understanding the difference between -

    Gate Length

    Gate width

    Channel Length

    Channel Width

    Channel Depth

    Depletion Layer Width

    Depeltion Layer length

    for a MOS transistor.
    Which of these quantities are equal and how are they efected by threshold
    voltage and gate voltage.
    I am confused as to especially w.r.t depth and width.

    Help is appreciated.

    Kranthi.
     
  3. Kranthi Q

    Kranthi Q Guest

    But aren't channel and depletion layer formed because of difference
    between gate and source?? I understand that for gate the length and
    width are physical dimensions but what about channel L, W and D. I
    want what effects the change of L, W and D.

    Thanx.

    Kranthi.
     
  4. peterken

    peterken Guest

    as i said, channels are formed during construction

    (see drawing with fixed font)

    _________
    / gate /
    / /
    ------------------
    \______/

    channel
    ______
    / gate\
    ------------------

    They all have PHYSICAL dimensions.

    The ELECTRICAL (virtual) width of the channel is formed by a voltage applied
    to gate, thereby forming an electric field in the channel, thereby
    reducing(depletion) or allowing (enhancement) the current through the
    channel itself, it has nothing to do with the given dimensions in the
    datasheets.
    It's all basic fet-stuff ya know.



    But aren't channel and depletion layer formed because of difference
    between gate and source?? I understand that for gate the length and
    width are physical dimensions but what about channel L, W and D. I
    want what effects the change of L, W and D.

    Thanx.

    Kranthi.
     
  5. Kranthi Q

    Kranthi Q Guest

    Thanks for your help. But I am in the learning stage of FET basics,
    and hence the questions!!
     
  6. rayjking

    rayjking Guest

    You are both correct . The difference is one being a simple j-fet and the
    other being a vertical power fet.
    Ray
     
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