Connect with us

regarding synchronization

Discussion in 'Electronic Design' started by prav, Feb 18, 2004.

  1. prav

    prav Guest

    hi all,

    I have a counter running at 50 Mhz . Now i have to sample that counter
    at 77 Mhz.

    My question is can i sample the counter running at 50 mhz directly
    with 77 mhz clock or should i synchronize the 50 mhz counter to 77 mhz
    clock domain and then only sample it.

    what are the effects if i don't the sample the 50 Mhz counter and i
    directly sample with 77 Mhz.

    rgds,
    prav
     
  2. Paul Burke

    Paul Burke Guest

    Sounds a little like homework, but... you'll have to be careful when the
    sampling clock and the counting clock happen close together. How close
    depends on the characteristics of your logic devices. Since some of the
    sampled values are bound to be the same irrespective of what the counter
    is doing, it sounds like the counter clock should lock out the sampling
    clock in the dangerous area, just leaving the latched value as before. I
    ca't imaging any system where you would want to lock out the counter clock.

    Paul Burke
     
Ask a Question
Want to reply to this thread or ask your own question?
You'll need to choose a username for the site, which only take a couple of moments (here). After that, you can post your question and our members will help you out.
Electronics Point Logo
Continue to site
Quote of the day

-