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Rectifier-LP filter circuit

Discussion in 'Electronic Design' started by Spehro Pefhany, Nov 10, 2007.

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  1. Hi, I'm analyzing a circuit (which I didn't design). It's part of a
    meter that outputs a DC voltage related to a 1kHz fairly low-level
    square-wave signal. Supply is +/-8 regulated. The JFET op-amps can
    handle +/-30V differential input voltage (provided the inputs don't
    go below the negative rail in particular).

    http://server2.hostingplex.com/~zstoretr/meter.gif

    This circuit is a little different from what I'm used to using for the
    precision rectification/LPF stages. C7 is polarized, minus on top,
    BTW.

    Can anyone see a good reason for D3? (or R13 for that matter, other
    than to increase the noise)?

    Thanks!


    Best regards,
    Spehro Pefhany
     
  2. john jardine

    john jardine Guest

    Just love oddall circuits!. The fun bit is to figure out what's going on
    without starting spice.
    I make it as a negative going peak detector with a 1 second TC . C7 fast
    discharge via D1, C7 slow charge via R15. R13 is needed to provide a defined
    0V, as with no input signal the setup could ratchet itself to one of the
    supply rails.
    D13 is a real puzzle. Maybe a opamp 'bypass' under negative going heavy
    slew?.
     
  3. Jim Thompson

    Jim Thompson Guest

    Doesn't look quite right to me... maybe some typos?

    ...Jim Thompson
     
  4. Fred Bloggs

    Fred Bloggs Guest

    It's not a rectifier, it's an inverting positive peak detector with gain
    of 12.1.
     
  5. I don't see that at all. With no input signal the output of the first
    op-amp should flicker back and forth between +0.6 and -0.6 to maintain
    its inverting input (pin 2) at zero. Since 2 is a virtual ground, I
    don't see that R13 does anything useful.
    Or maybe vestigial from an earlier op-amp that couldn't take much
    differential input voltage.


    Best regards,
    Spehro Pefhany
     
  6. Jim Thompson

    Jim Thompson Guest

    Methinks it's one big typo.

    ...Jim Thompson
     
  7. Joerg

    Joerg Guest

    That's what I thought but didn't post after looking at the old datasheet.

    BTW, didn't you buy one of those Atten Spectrum Analyzers in China? I
    was wondering whether to buy one for road use, just like Jim wants to
    buy a projector (because clients sometimes may not have one). Thinking
    about the Atten 5011, anyone know whether it's ok and how good the data
    transfer to a PC is?
     
  8. Fred Bloggs

    Fred Bloggs Guest

    That would be right, looking at the schematic of the TL082 in the TI
    datasheet, you see a bipolar Class AB output stage with 64 ohms in each
    emitter joined to a common 128 ohm in series with the output. That's
    about 200 ohm making for a 1ms time constant for the 4.7u load, while
    things are open loop. I'm not sure about D3, thought it maybe a reverse
    current compensation for D1 but R15 contributes so much bleed current,
    don't think that's it. Another possibility may have been for a nonlinear
    resistance, expediting reaching a balance condition when voltage drop
    exceeds 0.6V or so, but don't really see how that fits in that diagram.
    Must be for some kind of transient response that's not obvious, don't
    think it has to do with ESL on C7 since U2B should be able to follow
    anything U2A dishes out, but maybe, dunno. Are those gif's a simulation
    or measurement?
     
  9. Or deliberate obfuscation, but it seems to work (in simulation)
    regardless. I wonder if it's one of those things where someone fiddled
    with something on the bench until it seemed to work satisfactorily.

    Anyway, I'm going to start from first principles as usual; just want
    to make sure I'm not missing anything important.




    Best regards,
    Spehro Pefhany
     
  10. Joerg

    Joerg Guest

    I have seen circuits where it was almost like that. One version migrated
    into another, then another. At the end of the week schedule pressure
    built up and it was all hastily sent to layout, along with parts in
    there that no longer had any function. Like a transistor with collector
    as well as emitter to ground.
     
  11. Simulation. The designer does some fairly silly things elsewhere so
    your reverse current thing might be the answer (if there is one).


    Best regards,
    Spehro Pefhany
     
  12. Jim Thompson

    Jim Thompson Guest

    My favorite configuration....

    http://analog-innovations.com/SED/FullWaveRectifier.pdf

    A peak detector is also shown in the last few pages.

    ...Jim Thompson
     
  13. Fred Bartoli

    Fred Bartoli Guest

    Spehro Pefhany a écrit :
    I don't buy this reverse current thing at all. The diode is across
    inputs of a buffer that's buffering a slowly changing voltage, hence
    sees essentially 0V. More, why would you want to compensate any such low
    current when R15 deliberately injects a huge one?

    For me D13 is reminiscent of some "designer's" irrational fears. I see
    that a lot.
    As for R13, it's just an excellent way of increasing by a 12 factor the
    input opamp offset contribution to the output error.

    Just scrap both, you won't miss them.
    Some ESR on the 4u7 would probably be wise.

    On another post you say it's not supposed to work as a peak detector.
    I don't see it working otherwise and your sim waveforms look bogus to
    me. What's it supposed to do?
     
  14. It takes a peaky, maybe saggy, AC square wave and produces a DC
    (low-pass filtered) voltage related to the amplitude of the bit after
    the peaky bit and before it gets a chance to sag too much. Hence the
    "peak detector" and some other parts (some not shown) to round off the
    edges. I think I can replace a lot of that crap with a bit of digital
    smarts and some straightforward, noise immune and stable analog
    circuitry.


    Best regards,
    Spehro Pefhany
     
  15. You should not write manuals....
     
  16. john jardine

    john jardine Guest

    [...]
    Yep, under normal conditions it would flicker. But, U2A having just
    generated a negative peak output voltage on the cap has now decoupled itself
    from any hope of summing point control.
    Eg, a +100mV input will push 10uA through R16. C7 will be pulled down to
    minus 1.2V by U2A (~-1.9V at U2A o/p) with U2B and R14 pulling out that same
    10uA for VE balance.
    Drop the input to 0V. C7 sticks at -1.2V (as it should). Hence U2B is
    destined to still try and suck 10uA out of the summing junction.
    U2A can only saturate negative.
    Adding R13 will cause U2A to hold it's previous o/p voltage and the R13-R16
    junction to be dragged down to -100mV by the 10uA summing current.
    The whole lot slides towards 0V over a few seconds. The boss is the voltage
    on C7.
    (OTOH I may be totally bolloxed :)
    Personally, I reckon half the battle with these things is the circuit
    drawing. My LTspice is knackered so I used this paper spice ...
    http://img80.imageshack.us/img80/8531/scrap6cd6.jpg
     
  17. In your scenario, if Vin is 0V and R13 is not there we have 10uA
    flowing out of the input capacitor (let's suppose it's charged with
    +100mV so that the situation in your snapshot exists) so the input
    voltage at the inverting input drops at 1V/second until it passes 0
    (ideally), whereupon U2A's output goes positive and drives the
    non-inverting input back to zero through D2, right?
    I *think* so, unless I'm missing something.



    Best regards,
    Spehro Pefhany
     
  18. john jardine

    john jardine Guest

    [...]
    Yep. Thanks Spehro. Bolloxed, R13 not needed. Paper spice not correcting
    current sign for me!.
    Nasty arrangement, U2A would seem to spend it's functional time, current
    and slew limited..
     
  19. Fred Bloggs

    Fred Bloggs Guest

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