questions about constant-current source

[eehinjor]

some days ago,I asked this question here.the address of orignal topic
is
http://groups.google.com/group/sci....st&q=vp0610l&rnum=1&hl=zh-CN#c7a53f70c9b57e97

+12V
.. |
.. R1 5k to 5M
.. |
.. +-------------------------,
.. | 470pF |
.. | ,---||---, |
.. | | | |
.. '---+-|-\ | 100 ||--' S
.. | >-+-+--/\/\--||->
.. +7V -----|+/ | ||--, VP0610L
.. 15k | BS250
.. | | VP0106
.. -12V +-----------o
.. | |
.. |< .-.
.. +5.5V----| Q2 | |RL
.. |\ | |
.. | '-'
.. | |
.. o-----------o
.. |
.. ===
.. GND



Thanks all.I have made great improve by the circuit above.But there is
something confused.
When the current is 100uA/10uA/1uA,this circuit works right.Buth when
the output is 1mA,that means R1=5K,the output is not constant.
When RL=0,the output is about 1.000324mA,Vs is about 7.002V,but Vg is
more than 8.3V.When RL=240,the output is about 1.000219mA,Vs is about
7.003V,but Vg is more than 8.2V.When RL=5K,the output is only 0.87mA,Vs
is about 7.003V,Vg is about 4.5V.

I don't understand the reason.I know when Vgs is positive when Rl is
less than about 2.5K,but Vgs is negtive when RL is about 5K.
Could someone help me?

 

[Fred Bloggs]

some days ago,I asked this question here.the address of orignal topic
is
http://groups.google.com/group/sci....st&q=vp0610l&rnum=1&hl=zh-CN#c7a53f70c9b57e97

+12V
. |
. R1 5k to 5M
. |
. +-------------------------,
. | 470pF |
. | ,---||---, |
. | | | |
. '---+-|-\ | 100 ||--' S
. | >-+-+--/\/\--||->
. +7V -----|+/ | ||--, VP0610L
. 15k | BS250
. | | VP0106
. -12V +-----------o
. | |
. |< .-.
. +5.5V----| Q2 | |RL
. |\ | |
. | '-'
. | |
. o-----------o
. |
. ===
. GND



Thanks all.I have made great improve by the circuit above.But there is
something confused.
When the current is 100uA/10uA/1uA,this circuit works right.Buth when
the output is 1mA,that means R1=5K,the output is not constant.
When RL=0,the output is about 1.000324mA,Vs is about 7.002V,but Vg is
more than 8.3V.When RL=240,the output is about 1.000219mA,Vs is about
7.003V,but Vg is more than 8.2V.When RL=5K,the output is only 0.87mA,Vs
is about 7.003V,Vg is about 4.5V.

I don't understand the reason.I know when Vgs is positive when Rl is
less than about 2.5K,but Vgs is negtive when RL is about 5K.
Could someone help me?

View in a fixed-width font such as Courier.

..
..
.. +12V
.. |
.. R1 5k to 5M
.. |
.. +-------------------------------,
.. | 1n |
.. | ,---||---, |
.. | | | |
.. '---10k---+-|-\ | 100 ||--' S
.. | >-+-+--/\/\--||->
.. +7V ---10k-----|+/ | ||--, VP0610L
.. 15k | BS250
.. | | VP0106
.. -12V +-----------o
.. | |
.. |< .-.
.. +5.5V----| Q2 | |RL
.. |\ | |
.. | '-'
.. | |
.. o-----------o
.. |
.. ===
.. GND
..

 

[Winfield Hill]

eehinjor wrote...

some days ago,I asked this question here.the address of orignal topic
is
http://groups.google.com/group/sci....st&q=vp0610l&rnum=1&hl=zh-CN#c7a53f70c9b57e97

+12V
. |
. R1 5k to 5M
. |
. +-------------------------,
. | 470pF |
. | ,---||---, |
. | | | |
. '---+-|-\ | 100 ||--' S
. | >-+-+--/\/\--||->
. +7V -----|+/ | ||--, VP0610L
. 15k | BS250
. | | VP0106
. -12V +-----------o
. | |
. |< .-.
. +5.5V----| Q2 | |RL
. |\ | |
. | '-'
. | |
. o-----------o
. |
. ===
. GND

Thanks all. I have made great improve by the circuit above.
But there is something confused.
When the current is 100uA/10uA/1uA,this circuit works right.
But when the output is 1mA, that means R1=5K, the output is
not constant. When RL=0, the output is about 1.000324mA,
Vs is about 7.002V, but Vg is more than 8.3V.

Something is wrong, your listed MOSFETs are p-channel devices,
so the gate voltage should be a volt or so more negative than
the source.

When RL=240,the output is about 1.000219mA, Vs is about 7.003V,
but Vg is more than 8.2V.

Same story, something wrong.

When RL=5K, the output is only 0.87mA, Vs is about 7.003V, Vg
is about 4.5V.

That's the right direction, closer to a good gate-voltage value.
If Vs says it's at 7.00V, this means your 5k programming resistor
has 5.00V across it, and must have 1.00mA through it, if your
circuit is exactly as shown above.

I don't understand the reason. I know when Vgs is positive when
Rl is less than about 2.5K, but Vgs is negtive when RL is about 5K.
Could someone help me?

I wonder if you have the right MOSFET installed, if it's wired
in correctly, or of it's damaged? I'd also wonder about opamp
oscillation, but your 470pF should make that nice and stable.
What kind of opamp are you using?

What's the story with Q2?

 

[Winfield Hill]

Fred Bloggs wrote...

. +12V
. |
. R1 5k to 5M
. |
. +-------------------------------,
. | 1n |
. | ,---||---, |
. | | | |
. '---10k---+-|-\ | 100 ||--' S
. | >-+-+--/\/\--||->
. +7V ---10k-----|+/ | ||--, VP0610L
. 15k | BS250
. | | VP0106
. -12V +-----------o
. | |
. |< .-.
. +5.5V----| Q2 | |RL
. |\ | |
. | '-'
. | |
. o-----------o
. |
. ===
. GND

That's an interesting idea, adding a pair of opamp input resistors.
They shouldn't be necessary in a simple circuit, but we don't know
how eehinjor changes his resistor values, what kind of wiring and
panel switch, etc., he's using. These need to be isolated from the
opamp's high-frequency feedback capabilities to prevent oscillation.

 

[eehinjor]

Thank you,Winfield Hill.
I know there is something wrong with it.But the chip is all right.At
first I doubted this problem,and replaced the mosfet and OP.It works as
before.When the output is 100uA/10uA/1uA,it works all right.

My opamp is OPA602.

Q2 is to limit the voltage on RL below +5.5V.

 

[eehinjor]

Because my output is 1mA/100uA/10uA/1uA,the resistor is
5K/50K/500K/5M.The multipluxer is DG409.

Fled Bloggs is right,there should be input resistors.In this ciruit Vg
should be constant.
The data:
When Rl=0,Vg=7.01940V.
When Rl=240,Vg=7.02626V.
When Rl=2.5K,Vg=7.03293V.
When Rl=5K,Vg=7.03323.
from the data above,we can know the input voltage is influenced by the
opamp.

I don't know what's wront with this circuit,the 100,470pf or others?

 

[Robert Baer]

Fred Bloggs wrote...



That's an interesting idea, adding a pair of opamp input resistors.
They shouldn't be necessary in a simple circuit, but we don't know
how eehinjor changes his resistor values, what kind of wiring and
panel switch, etc., he's using. These need to be isolated from the
opamp's high-frequency feedback capabilities to prevent oscillation.

Seems to me that *if* 1mA was flowing thru Rl of 5K, then the drain
of the FET would be at 5V; continuing with ASSuME-tions, let the opamp
be working "properly" so that the source of the FET would be at 7V.
That would make for only 2V across the FET; will it actually work there?
The various part numbers given do not help; they are different parts
and some are obsolets.

 

[eehinjor]

Thank you,Robert.
I am afraid I can't accept your explain.
If Vds is 2V,this circuit can not work.Why it can work when the outpu
is 100uA?

 

[Winfield Hill]

eehinjor wrote...

Thank you,Winfield Hill.
I know there is something wrong with it.But the chip is all right.At
first I doubted this problem,and replaced the mosfet and OP.It works as
before.When the output is 100uA/10uA/1uA,it works all right.

It may be delivering the output you want, but when you take
your meter off the output and look at the gate voltage, it
becomes defective at that point, showing an incorrect value.

 

[Winfield Hill]

Robert Baer wrote...

Seems to me that *if* 1mA was flowing thru Rl of 5K, then the drain
of the FET would be at 5V; continuing with ASSuME-tions, let the opamp
be working "properly" so that the source of the FET would be at 7V.
That would make for only 2V across the FET; will it actually work there?

The FET will be happy with 2V, hey at 1mA it'll "work" with anything
more than Id*Rds(on), which is less than 10mV or so. But how did you
get the 2V value, by assuming a high-value load? Or an open circuit?
Presumable eehinjor tests his 1mA output with a small load resistor?

 

[eehinjor]

What should I do next?
So confused.

 

[Jim Thompson]

What should I do next?
So confused.

Backup.

Think.

Try to understand what it's supposed to be doing.

I've been busy picking on Win ;-) and haven't kept close track of this
thread... what's your problem/misunderstanding?

...Jim Thompson

 

[eehinjor]

Thank you,Jim.
My question was posted.The output of this circuit is not constant.

 

[Robert Baer]

Thank you,Robert.
I am afraid I can't accept your explain.
If Vds is 2V,this circuit can not work.Why it can work when the outpu
is 100uA?

Well, then there is less drop making for larger Vds, putting any FEt
into its operational range (what i call "linear" range - where the Id VS
Vds is flat).
Note that my explaination said "if".. so if the FET cannot work at
Vds=2V, then the ASSuME-ptions would be false, and your measurements
should show what is happening or not happening.

 

[Tony Williams]

+12V
. |
. R1 5k to 5M
. |
. +-------------------------,
. | 470pF |
. | ,---||---, |
. | | | |
. '---+-|-\ | 100 ||--' S
. | >-+-+--/\/\--||->
. +7V -----|+/ | ||--, VP0610L
. 15k | BS250
. | | VP0106
. -12V +-----------o
. | |
. |< .-.
. +5.5V----| Q2 | |RL
. |\ | |
. | '-'
. | |
. o-----------o
. |
. ===
. GND

When RL=0,the output is about 1.000324mA,Vs is about 7.002V,but
Vg is more than 8.3V.When RL=240,the output is about
1.000219mA,Vs is about 7.003V,but Vg is more than 8.2V.When
RL=5K,the output is only 0.87mA,Vs is about 7.003V,Vg is about
4.5V.

The drop to 0.87mA in RL could be explained if the balance
was going through Q2. Possible causes could be.....
1. Effective RL, (+ ammeter shunt-R?), is greater than 5k.
2. The base voltage of Q2 is lower than 5.5V.

Put a temporary 1k in series with Q2 collector to check
for Q2 current.

I don't understand the reason.I know when Vgs is positive when Rl
is less than about 2.5K,but Vgs is negtive when RL is about 5K.

Doesn't make sense.

BTW: For this circuit all voltages should be referenced
to the +12V. eg, the 7V ref should be a -5V ref hanging
down from the +12V, and most DVM measurements taken with
respect to the +12V.

BTW2: When the 5k is switched in, the -ve input of the opamp
might get temporarily pulsed above the rated CMV. For some
opamps this has been known to reverse the polarity of the
inputs and cause a lockup. The solution is a diode between
-ve and +ve, (-ve --|>|-- +ve).

 

[eehinjor]

Hi,Tony.
Yes,you are right.Later I removed Q2 from my board.The output is better
than before.But if there is no Q2,how can I restrict the voltage on RL
below 5.5V?

Bur the error is more than I want,especially when RL changed from 0 to
5K,the output can change from 1.0024mA to 0.9998mA.My goal is
1mA,0.01%.

Would you give me more advice?

 

[Tony Williams]

Yes,you are right.Later I removed Q2 from my board.The output is
better than before.But if there is no Q2,how can I restrict the
voltage on RL below 5.5V?

Ok, there is something wrong with the Q2 circuit.
Forget it for now, get the C-C circuit working
first, then re-visit the voltage clamp.

Note though that Q2 should have affected the lower
current ranges even worse. A puzzler to ponder.

Bur the error is more than I want,especially when RL changed from
0 to 5K,the output can change from 1.0024mA to 0.9998mA.
My goal is 1mA,0.01%.

That's a 2.6uA change for a 0-5v swing. Almost as
if you have a 2meg shunt across the 5k+Ammeter.

Question1. Do you have a component in there that
you did not fit for the other ranges. For example,
(noticing that you are reading 1mA to 4 decimal
places), have you dropped a capacitor across the
output to cut noise on the Ammeter?

Question2. Do you have a scope, permanently on Vg
and set to AC, 10mV, so that you have a continuous
indication of possible oscillation?

Question3. Can you (re)confirm that the lower ranges
worked perfectly. In fact publish the current outputs
for the same 0V and 5V outputs.

Thanks,

 

[Tony Williams]

[snip]

BTW: For this circuit all voltages should be referenced
to the +12V. eg, the 7V ref should be a -5V ref hanging
down from the +12V, and most DVM measurements taken with
respect to the +12V.

Using my own post to suggest some experiments.

Expt1.
~~~~~
Move the ammeter so that it is directly in series
with the Source of the Mosfet. See what the 1mA
does when RL is changed from 0 to 5k.

The purpose of the experiment is to ensure that
all the current coming down R1 goes into the source.
ie, No leakage path around the opamp.

Expt2.
~~~~~
Put a DVM (10uV-resolution) between opamp -ve and +ve.
Look at the change in opamp input voltage when RL is
changed from 0 to 5k..... it should be zero.

Purpose is to check the faint chance that the opamp
gain is very low (for some unknown reason).

The scope on Vg to look for oscillation is probably
essential for this experiment.

 

[Robert Baer]

Ok, there is something wrong with the Q2 circuit.
Forget it for now, get the C-C circuit working
first, then re-visit the voltage clamp.

Note though that Q2 should have affected the lower
current ranges even worse. A puzzler to ponder.




That's a 2.6uA change for a 0-5v swing. Almost as
if you have a 2meg shunt across the 5k+Ammeter.

Question1. Do you have a component in there that
you did not fit for the other ranges. For example,
(noticing that you are reading 1mA to 4 decimal
places), have you dropped a capacitor across the
output to cut noise on the Ammeter?

Question2. Do you have a scope, permanently on Vg
and set to AC, 10mV, so that you have a continuous
indication of possible oscillation?

Question3. Can you (re)confirm that the lower ranges
worked perfectly. In fact publish the current outputs
for the same 0V and 5V outputs.

Thanks,

....and add in the meter loading when making measurements.
Perhaps adding in opamp voltage followers will give sufficent
isolation - but will add in their own errors (input offset voltage,
input current loading).