Question About IC Chips

Should the used pins be left unconnected or should they be taken to ground?

 

It depends entireley on the device in use.

Chris

 

I suggest leaving _used_ pins alone...

 

I read in alt.binaries.schematics.electronic that
wrote (in

You mean 'unused pins'. It depends on the device; you need to read the
data sheet. Some devices require a resistor to ground or to supply. Some
MUST NOT be connected to anything at all.

Newsgroups reduced to FOUR.

 

I read in alt.binaries.schematics.electronic that Vidar Løkken

Once they have been used, they should be cut off and discarded.

Newsgroups reduced to four.

 

Sorry for my typing skills. I ment to say:

What do you do with unused pins?

 

That depends on the chip used. Generally, "inputs" can be grounded while
outputs are left unconnected. Check the chip's datasheet for current consumption
with inputs at Vss and Vcc, it might consume less power if the pins are pulled
up to Vcc instead.

 

Try reading the data sheet? On some I/C's spare pins are just
floating objects... on others they may be used as test points during
manufacture and are designated NC (no connection).

...Jim Thompson

 

Sell them on Ebay?

 

If they're truly unused, it shouldn't matter. If they're connected
internally, then logic should prevail.

 

Generally, unused output pins should be left unconnected.

What you do with unused input pins will depend on the chip - for CMOS
logic parts, all input pins must be connected to something, and unused
input pins must be connected in a way that will allow the chip to work
as required. For example, and active low "reset" pin must be
connected to the positive supply, otherwise the chip will be
permanently held in its reset state.


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All the jokes aside, an unused input to a logic circuit should never be
left floating. You never know what state it will take on powerup. Worse,
you never know when it's going to change.

Tie each unused input to whatever value won't change the output. For
instance, if you use a two-input NAND gate as an inverter, you can tie one
input high or to the other input. Both will work, although paralleling
inputs increases the fan-in, which may be significant. With an OR or NOR
gate, unused inputs need to be held low. Some logic families may require
a resistor instead of a direct connection to either supply rail; check
your data sheets.

Unused outputs can float.

 

And everyone who replied meant to say: "It's entirely dependent on
the chip used, and the circuit it's used in." In general, unused
outputs can be left alone, unused inputs should probably be tied high
or low, sometimes through a resistor, but you can't tell without a
detailed schematic and a datasheet and/or application note for the
specific IC used. I can probably think of a dozen examples of where
my "general" rules above are wrong, for instance...

 

Along those same lines, what about unused microcontroller ports? Say a PIC
16F8xx. Can you just set them as outputs and ignore them?

--
Glenn Ashmore

I'm building a 45' cutter in strip/composite. Watch my progress (or lack
there of) at: http://www.rutuonline.com
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The recommendation for logic gates is to connect unused AND gate inputs to
the positive supply through a 1K resistor.

OR gate inputs are to be connected to ground.

Why this is recommended is obvious from the logic function the gates
perform.

If the unused inputs are not logic gate inputs it gets more complicated, as
Jim and others have mentioned.

Robert

 

"Glenn Ashmore" wrote ...

That would certainly seem like the logical thing to do.
No pun intended.

 

I read in alt.binaries.schematics.electronic that Richard Crowley

Oh, go on, intend away! No-one was ever punished for a really good pun.

You know what is paved with good intentions? (;-)

 

Unused inputs should be tied to either VCC or ground. If they are left
open, it is possible the chip will start "oscillating", if the input is
moving
between on and off. This will probably not affect the chip, but may cause
odd problems elsewhere in the circuit.

At one time, it was the military practise to attach unused inputs through
a 1K resister to VCC. Doing this is longer thought necessary, just attach it
directly.

Aidan Grey

 

I know digital designers who do this as standard practice... it allows
easily forcing a test signal when trying to track a fault.

...Jim Thompson

 

It was only "necessary" for TTL, where the base-emitter
junction following a strapped-high input could be stressed
if forced into breakdown by excessive VCC. This is not
a concern with CMOS, where, by the time an input gate
is in jeapardy, so are many of the internal gates.

Another reason I've seen for strapping thru a resistor is
so, during board test development, canned routines can
be applied to the part, testing used and unused gates
alike. It takes a tiny extra effort to not test an unused
gate or ignore one that fails because its input cannot be
wiggled enough. (That practise always stuck in my craw,
since unit cost was among my responsiblities, but I heard
it from enough different test folks that I guess it could be
part of their lore of "good" practise.)