S
Sergio de la Cruz
- Jan 1, 1970
- 0
Hi:
I'm trying to simulate in Proteus a design that includes a component
described in VHDL. I don't know how to do that. Any comment will help.
Thanks,
Sergio
I'm trying to simulate in Proteus a design that includes a component
described in VHDL. I don't know how to do that. Any comment will help.
Thanks,
Sergio