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proper response?

Discussion in 'Electronic Design' started by John Larkin, Aug 23, 2007.

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  1. Jim Thompson

    Jim Thompson Guest

    Ignorant/rude responses, such as yours, ensure that I will use my
    legal muscle to require licenses and enforce citations.

    So there, you ****-head ;-)

    ...Jim Thompson
     
  2. Jim Thompson

    Jim Thompson Guest

    Now I get your gist. The way it happened is I was already at Motorola
    Semiconductor Products Division, Tom was at some military contractor
    in southern California, but got laid off.

    Moto hired him and the only space was in my double-wide cubicle.

    ...Jim Thompson
     
  3. You should thank him. I've designed a few things in my career and had
    great difficulties getting anyone to spend the time reviewing the
    design or implementation. Everyone was busy and nobody had the time
    to do it. You'll find that feedback, in any form should be welcomed,
    not defended against. Look at it this way. If it works, YOU are the
    hero. If it's a better design as a result of peer review, then YOU
    still get the credit.

    How a person packages their criticism or review should not be a
    consideration. Most of the people I respect are arrogant, self
    centered, egotistical, tactless, demanding, and short tempered. That's
    mostly a defense mechanism against getting overloaded with excessive
    work. If you did your part of the design in a reasonable manner,
    you'll probably get the respect you deserve. If you made a mess of
    things, you'll be the first to know.

    Much more important is what to do when he actually delivers a proper
    detailed design review. If you go on the defensive, you'll never get
    him to look at your design again. He's just declare it to be a waste
    of his time as you aren't really interesting in listening to his
    comments.

    More appropriate would be to listen carefully, do NOT pass judgment,
    thank him profusely for his efforts, and sneak off into a corner
    somewhere to objectively consider his comments. Even if you don't
    take any of his changes as useful, he also deserves some feedback. If
    you like one of his ideas, but don't have the time to implement it,
    then tell him so.

    As for his rather odd statement, I suspect you may be reading it out
    of context. I analyze everything based on the assumption that
    everything is wrong until calculated otherwise. The most common
    mistakes are the result of bad assumptions. By assuming that all the
    calcs and design work was done wrong, I get to check both the calcs
    and the assumptions. Most often, the calcs are correct, but the
    assumption that they are based upon are wrong. If you assume that it
    was designed by an idiot, the assumption float to the surface where
    they can be inspected.
     

  4. Excellent response! Quite the proper action(s) as well.
     
  5. John Larkin

    John Larkin Guest

    We dropped off the support/upgrade bandwagon when it became obvious
    that Mentor would wreck PADS. When they started offering courses to
    longtime users on how to use the new version of Logic, we were outta
    there.

    PowerPCB V5.0 (July 2002) seems like a perfect PC layout program, so
    all they can do is break it.

    John
     
  6. John Larkin

    John Larkin Guest


    I did! I wanted him to find all possible mistakes, which he can only
    do if he assumes I can make all possible mistakes. Which I can!

    John
     
  7. Well, that's a good start, but not sufficient. During the late
    1990's, I was doing some design reviews for former employers that had
    successfully overloaded their engineering staffs and were forced to
    hire outside consultants. I learned how it was done the hard way.

    One person can do a tolerable design review, but it's much better to
    have a "team" of people look at a design. It's the same as with any
    team effort. The participants competative pressure push each other
    along until the results are much better than if they had worked
    individually.

    It's also a good idea to get manufacturing involved early in the
    design review. They may not know anything about electronic design,
    but they sure know that you can't hang components over the edge of a
    board, or use top heavy parts that require hand insertion, or want to
    deal with awkwardly milled boards, or a thousand other things that
    only ocurr in passing to the average design engineer.

    Formality is also a major impediment. Far better results were
    obtained with engineers over pizza and beer than in the corporate
    boardroom with the managers pretending to be helpful. If the results
    look promising, you might want to go somewhere with your new found
    accomplis, and discuss some of his logic and reasoning.

    The most difficult part is to recognize the difference between
    implimentation selection and a bad approach. Neigher is totally
    wrong, but both involve alternatives which may not necessarily be any
    better. For example, I might decide to use some some sole source
    vendors magic bullet chip, instead of a more expensive, but more
    commonly available discrete solution. To the design engineer, the
    integrated solution offers substantial benifits in consistency and
    production variations. To purchasing and production, the sole source
    may soon become a major problem if the vendor decides to obsolete the
    product or delay chip production because it's insufficiently popular.
    So, which is the best implimentation? Well, it depends on what the
    designer and reviewers consider important. No, it's not a coin toss.
     
  8. Robert

    Robert Guest

    Yeah, a lot of users on the Forum say that. Did you install the Service
    Pack(s) for that version or just use as is?

    Did you hear that they charge you something like 60% (IIRC) of the
    Maintenance price for the time you were off to get back on? Plus the regular
    Maintenance fee.

    Robert H.
     
  9. Robert

    Robert Guest

    Yep. That was the luck I meant. Paired up (at least in the same cube) with a
    guy where you could bat ideas back and forth like that.

    Robert H.
     
  10. legg

    legg Guest

    One issue I've seen with PADS is in schematic entry. What you see is
    not necessarily what you get - a trace can appear to be connected,
    without sharing the correct net. You have to query every single one to
    be sure.

    Schematic 'errors', of course, go through the other processes like
    grease through a pig.

    Another issue I have is with drill and pad detail. Firstly, no attempt
    is made to produce representative scale drill work in the art - so
    you'd best check the DD of the gerbers, if you don't want surprises.
    This issue with scale actually applies to the traces and patterns
    themselves - so I count on printed gerbers to tell me what the board
    vendor will see. Producing different pad art on varying layers, or
    thermal relief differing from the default is both error-prone and
    frequently impossible, given the choices offered in the GUI.

    It sure ain't art, not by a long shot.

    RL
     
  11. John Larkin

    John Larkin Guest

    I've never seen that happen. PADS-Logic, unlike some other schematic
    programs, simply doesn't allow dangling line segments on a schematic.
    You can't draw a line that near-misses another net, and if you delete
    any segment of a connection, the entire thing vanishes.

    I did notice this problem on older versions of Orcad, near-miss
    connections, but that was a long time ago.
    The only hazard we see is the strangely-named "signal pins" which are,
    in fact, invisible power and ground pins. If a part is created with a
    hidden pin named "+3.3V" but you really want to power it from "+3.5V",
    from a separate regulator maybe, you've got to check that carefully.
    Again, we don't see a problem here. Traces and pads are shown on the
    screen drawn to scale, on all the proper layers, as are drills. We
    don't look at gerbers, we don't prototype, we go directly to
    multilayer pcb's, and most of our stuff is sellable at rev "A", the
    first etch. I can't remember a time when PADS itself caused a problem,
    or even crashed.


    John
     
  12. Jim Thompson

    Jim Thompson Guest

    One of the many circuits I came up with, with Tom betting I couldn't
    do it, was the "Thompson" Current Mirror in....

    http://analog-innovations.com/SED/EnhancedCurrentMirrors.pdf

    Another was...

    http://analog-innovations.com/SED/MC1554-DataSheet.pdf

    a co-design with Tom.

    ...Jim Thompson
     
  13. Nico Coesel

    Nico Coesel Guest

    Weird how that sickness spreads around the globe. Over here these guys
    and girls can be a real menace because they think they own the road.
     

  14. Like the one where you think you know how to properly use a vapor phase
    degreaser machine.
     
  15. Nico Coesel

    Nico Coesel Guest

    Or a broken computer... Bad memory can do weird things to a PCB design
    and you won't notice it until the board is on your bench.
     
  16. John Larkin

    John Larkin Guest

    I didn't buy it and I don't use it. I hire people to manufacture
    things, so I can spend my time designing. Thirty million dollars worth
    of clean boards later, I'm not complaining.

    But OK, tell us the proper way to use a "vapor degreaser" to clean
    flux off of production PC boards.

    John
     

  17. That's why you should use ECC memory in a CAD workstation.
     
  18. Terry Given

    Terry Given Guest

    I lIke it! best of all, I can make them with my favourite dual
    transistor, the BC847BPN.....
    Cheers
    Terry
     
  19. Terry Given

    Terry Given Guest

    I never, ever have hidden pins. spent too much time faffing around with
    this sort of problem.
    I worked on one design in the US, done in PADS, that had some serious
    problems. The layout guy was a contractor (and a fairly crap one). We
    fixed some problems, and got him to spin a new rev. When I was debugging
    it, I found an inner-layer trace shorted to chassis. turns out he'd
    dragged the trace, right thru a (thru-plated) mounting hole. At which
    point alarm bells started ringing. So I asked about the DRC, and got an
    odd response - basically dissembling, about how it was "too hard".
    Turned out the schematic had been drawn up, then the PCB laid out
    *without* netlisting etc - the PCB was essentially hand-drawn. As such,
    NONE of the automatically generated net names matched up, so the DRC
    gave a zillion errors - and thus got ignored.

    I made him fix it. turned out to be a serious PITA, as (at that stage)
    PADS couldnt automagically re-assign net names. So Ralph had to do it
    manually - it took about 2 days, and in the process we found several
    other glaring mistakes. Needless to say, I was gobsmacked, having never
    before (or since) seen such a misuse of CAD tools.

    mind you, a young techie did a layout for a tester me, his first PCB. He
    DRC'd it, said all was fine and we built it. During debug, he had some
    problems, so I helped him figure out what was wrong - and found several
    tracks were missing:

    "did you DRC it?"

    "yep"

    "show me"

    He DRC'd it all right; Protel comes with with a "DRC completed" box,
    with a big OK button. And created a DRC file with 5,000 violations, but
    didnt automatically open it. He clicked "OK".....

    so it was entirely my fault!

    (later versions of protel (AKA no-go-tel) noiw open the DRC file....)

    Cheers
    Terry
     

  20. I have encountered them riding eight abreast, across both lanes of a
    rural two lane highway. Lots of blind curves, and a 55 MPH speed
    limit. Its a wonder most of them weren't killed.


    --
    Service to my country? Been there, Done that, and I've got my DD214 to
    prove it.
    Member of DAV #85.

    Michael A. Terrell
    Central Florida
     
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