Programming FPGAs with FLASH

[Toni Merwec]

Hi there,

currently I am designing an FPGA board, featuring two Xilinx Virtex-4 FPGAs.
It should be possible to program them with onboard Xilinx Platform FLASH
PROMs as well as via JTAG with the IMPACT software. For ease of use and
debugging all components should be part of one coherent JTAG chain.

Now I'd like to know HOW to connect two FPGAs and two Platform FLASH devices
in one JTAG chain so that each FPGA can be programmed through the associated
FLASH? How is the identification done (i.e. which FLASH is associated with
which FPGA?!)?

Thanks alot in advance...

Regards

Toni

 

[tlbs101]

Hi there,

currently I am designing an FPGA board, featuring two Xilinx Virtex-4 FPGAs.
It should be possible to program them with onboard Xilinx Platform FLASH
PROMs as well as via JTAG with the IMPACT software. For ease of use and
debugging all components should be part of one coherent JTAG chain.

Now I'd like to know HOW to connect two FPGAs and two Platform FLASH devices
in one JTAG chain so that each FPGA can be programmed through the associated
FLASH? How is the identification done (i.e. which FLASH is associated with
which FPGA?!)?

Thanks alot in advance...

Regards

Toni

Hi.

I've done this several times in the past.

Tie all the TCK and TMS signals in parallel.
Tie each TDI to the next TDO. In your case it would be wise to tie
the TDO signal from the Flash to the TDI of its FPGA, then tie the TDO
signal of that FPGA to the TDI signal of the next Flash, etc. The
JTAG connector will have the first flash TDI on a pin and the 2nd FPGA
TDO as a pin.

Impact will recognize the chain and show icons for each device. You
select the flash you want to download your config file to, and Impact
will write to that memory, only.

Make sure you have the proper version of Impact and the proper version
of the JTAG programming cable. Impact is very picky about cables and
software versions.


Hope this helps,
Tom P.

 

[Nico Coesel]

Hi there,

currently I am designing an FPGA board, featuring two Xilinx Virtex-4 FPGAs.
It should be possible to program them with onboard Xilinx Platform FLASH
PROMs as well as via JTAG with the IMPACT software. For ease of use and
debugging all components should be part of one coherent JTAG chain.

Now I'd like to know HOW to connect two FPGAs and two Platform FLASH devices
in one JTAG chain so that each FPGA can be programmed through the associated
FLASH? How is the identification done (i.e. which FLASH is associated with
which FPGA?!)?

The FPGA's serial configuration busses should be connected in series
if you use one FLASH device. You let Impact create a bitstream with 2
FPGA designs. Load this bitstream into the flash rom and you're ready
to load the FPGA's. If you want to use 2 flash devices, connect the
TDO and TDI from the flash devices in series. Impact will see the 2
devices in series and you can assign a file to each of them.

BTW, if you have some sort of microcontroller on your board, it might
be easier / more convenient / cheaper to load the FPGAs from flash
connected to the microcontroller.

 

[David L. Jones]

Hi there,

currently I am designing an FPGA board, featuring two Xilinx Virtex-4 FPGAs.
It should be possible to program them with onboard Xilinx Platform FLASH
PROMs as well as via JTAG with the IMPACT software. For ease of use and
debugging all components should be part of one coherent JTAG chain.

Now I'd like to know HOW to connect two FPGAs and two Platform FLASH devices
in one JTAG chain so that each FPGA can be programmed through the associated
FLASH? How is the identification done (i.e. which FLASH is associated with
which FPGA?!)?

The devices should be displayed by their physical location in the
chain. So you daisy chain the TDI/TDO pins in the physical position
you want them to be displayed on screen. That's all you can really do
if you have more than one of the same device on the chain.

Dave.

 

[Toni Merwec]

Hi.

I've done this several times in the past.

Tie all the TCK and TMS signals in parallel.
Tie each TDI to the next TDO. In your case it would be wise to tie
the TDO signal from the Flash to the TDI of its FPGA, then tie the TDO
signal of that FPGA to the TDI signal of the next Flash, etc. The
JTAG connector will have the first flash TDI on a pin and the 2nd FPGA
TDO as a pin.

Okay, thank you very much. I've done it that way now. But one more question:
What about the DO pins from the PROMs to the FPGA. In the Platform Flash
In-System Programmable Configuration PROMs data sheet ds123.pdf (page 18) it
is recommended to tie the DO outputs of both PROMs together and connect the
FPGAs in series. I don't see any reason to do it this way. What I would have
done normally (without having read the user guide) is having the DO of one
PROM connected to one FPGA (DIN) and the other DO of the second PROM to the
the other DIN of the remaining FPGA. What is the reason not to do so, i.e.
is there any reason? Any help is highly appreciated!

Regards

Toni