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Problem in Process corner simulation using Cadence ADXL tool.

Discussion in 'PCB Layout, Design and Manufacture' started by Alex_Bam, Mar 4, 2021.

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  1. Alex_Bam

    Alex_Bam

    21
    1
    Sep 28, 2020
    Hello,
    My question is related to CADENCE software simulation.
    I am doing a process corner simulation of a simple inverter using ADXL in CADENCE. But the problems are:

    1_ When I run only the nominal corner it simulates successfully as shown in the figure.

    2-But when I add worse power /worse speed corner scenario for CMOS then individually it runs, however when I combine different corners (e.g. nominal, wort power, and worst speed scenarios) then it not simulating and showing a pending option [attached]. Moreover in remarks, it shows the following message:

    net /Vin selected but not highlighted
    net /Vout selected but not highlighted

    To make it simple, individual corner simulation runs successfully but it does not simulate in the case of combined process corners. And I would like to simulate all the corners simultaneously so that I can compare my simulation result under different scenarios.


    Can anyone have faced a similar problem or suggest to me possible ways to solve it?

    Thanks.
     

    Attached Files:

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