I don't know, but his "simulation" of what's required for our product
looks a lot like the example in the PDF. I wonder if I can have a
business model like that?
Look at Figure 7. It shows the six caps as having monotonically
greater impedances at 1 GHz, with huge differences, even though the
esl's aren't very different for the four ceramic caps. That is crazy.
An 0603 cap has an inductance that changes little with capacitance
value. So above the srf, the z's will be about the same, regardless of
value, converging at high frequencies. That's not what he shows.
Just use biggish 0603 caps, 0.33 uF maybe, and tight power/ground
planes. Four caps per supply maybe.
This lunatic is suggesting something like 150 capacitors PER FPGA. How
can you route around 300 (or 600!) vias? He should be committed to a
nice institution where he can get the help he needs.
John