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Power converter control by FPGA

Discussion in 'Microcontrollers, Programming and IoT' started by ronaldtcy, Nov 1, 2016.

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  1. ronaldtcy

    ronaldtcy

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    Nov 1, 2016
    Hi I am Ronald, a final year electronics engineering student and i am hoping there is someone that can help me:(.I am working on a project about a power converter control by FPGA. I am deciding to do a current control scheme.

    However, problems come. I decide to use a voltage divider to feed a low voltage in the control loop. The flow should be as followed:
    ADC -> A Error amp(Subtract the feedback voltage and Vref) ->PID -> PWM -> Push the switches. However, I have no idea how to design the PID loop. My professor ask me to make it simple by just multiplying a gain K in the P loop first. But I still dont have any idea.:(I appreciate a lot. Thanks!!!!
     
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