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Potentiometer Voltage Divider

Discussion in 'Electronic Design' started by John Popelish, Apr 12, 2007.

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  1. There are at least two concerns.

    1. How much power are you willing to dump into the
    potentiometer?

    2. How much current must the divider supply to the load on
    the voltage tap? (Or alternately, what maximum output
    impedance can you tolerate?)
     
  2. wt

    wt Guest

    When using a potentiometer as a voltage divider, any potentiometer will do
    since it is just the ratio i.e. whether 10k or 100k or 1Meg.
    What I want to know is are there any factor we should decide on when
    choosing either 10k,100k or whatever.
     
  3. Tom Bruhns

    Tom Bruhns Guest

    One more--well, actually two: certain values are more robust than
    others. For example, a wirewound potentiometer that's wound with very
    fine wire may wear the wire out after fewer revolutions than you'd
    like. But one that's wound with coarse wire has lower resolution (if
    it's otherwise the same), so that's another consideration. Also, I
    think you'll find quite a bit of variability in quality according to
    how one is built, but also expect very high values to not survive as
    well, as a rule, as lower values in the same product line.

    Cheers,
    Tom
     
  4. Dave Boland

    Dave Boland Guest

    The resistance can affect a couple of things. Let's say you
    are feeding an analog to digital converter and the pots are
    fed from the reference voltage. The higher the resistance,
    the less current drawn from the reference. Some references
    won't supply a lot a current - a few dozen mA for example.
    In this case a 20 K pot will be helpful because it will draw
    so little current that it won't be a serious loading factor
    on the reference (i.e. 4.096.v/20K = .2mA).

    However, the Zout of the 20 K pot is less than 1 Ohm to
    about 1/4 the max. value, or 5 K (Using a Thevin equiv.
    circuit). 5 K may be too large to drive an ADC with a fast
    aperture (sample) time. This is because there is an RC time
    constant created by the pot and the sample capacitor in the
    ADC. You would need to drive the ADC with an op-amp to use
    this high of value.

    Hope this helps guide you.

    Dave,
     
  5. Eeyore

    Eeyore Guest

    You can add the influence of the pot resistance on noise to that as well.

    Graham
     
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