PLL Stability problem?

[joe]

I am designing a PLL using a linear PD, charge pump+loop filter
and then VCO. the control voltage looks like this
http://www.pbase.com/image/24415700
where at A and B, the phase error is zero but the frequencies are slightly
off.
Although it may still lock finally, I was expecting to see sth in this
picture.
http://www.pbase.com/image/24415255

I am not sure if this is a stability problem. It met the stability limit
according to
Dr. Gardner's book and paper (1980, "charge-pump phase-locked loops")

The filter I used is (500 ohms+2pF)//(400fF)

Any comment or suggestion? Thank you!

Merry Christmas!

Joe

 

[John Larkin]

I am designing a PLL using a linear PD, charge pump+loop filter
and then VCO. the control voltage looks like this
http://www.pbase.com/image/24415700
where at A and B, the phase error is zero but the frequencies are slightly
off.
Although it may still lock finally, I was expecting to see sth in this
picture.
http://www.pbase.com/image/24415255

I am not sure if this is a stability problem. It met the stability limit
according to
Dr. Gardner's book and paper (1980, "charge-pump phase-locked loops")

The filter I used is (500 ohms+2pF)//(400fF)

Those numbers are weird. 500 ohms * 2 pF gives a 1 ns time constant,
and 400 fF basicly doesn't exist. If your loop is really this fast,
lots of other parasitics will exist.

What are the numbers (cf, capture range, etc)?

John

 

[Jim Thompson]

The data rate is 10 Gb/s. The 400fF is supposed to suppress the ripple
of the VCO control voltage, as said in the textbook.

I haven't tested the capture range. I need to fix the lock-in speed
(maybe stability issue) first before I worry about the capture range
and other issues. The lock-in time is too long for any frequency now,
that's my original problem.

Your control-voltage waveform says you're under-damped. Add series R
to ground... a "zero".

...Jim Thompson

 

[joe]

The data rate is 10 Gb/s. The 400fF is supposed to suppress the ripple
of the VCO control voltage, as said in the textbook.

I haven't tested the capture range. I need to fix the lock-in speed
(maybe stability issue) first before I worry about the capture range
and other issues. The lock-in time is too long for any frequency now,
that's my original problem.

 

[joe]

Thanks, Jim.

Now the filter is
Chargepump--3kohm//{(3kohm+2pF)//400fF}--VCO
and I got this
http://www.pbase.com/image/24422122/original

it's not perfect though. Is there any optimal damping factor value
I should target? 0.7?

thanks a lot! and Merry Christmas!

 

[Jim Thompson]

Thanks, Jim.

Now the filter is
Chargepump--3kohm//{(3kohm+2pF)//400fF}--VCO
and I got this
http://www.pbase.com/image/24422122/original

it's not perfect though. Is there any optimal damping factor value
I should target? 0.7?

0.707 is "optimum", but I've seen 0.5 argued as a better compromise
between lock time and ripple.

I'd gradually up the resistor value until I got close to a single
over/under shoot.

thanks a lot! and Merry Christmas!

...Jim Thompson

 

[Allan Herriman]

0.707 is "optimum", but I've seen 0.5 argued as a better compromise
between lock time and ripple.

I'd gradually up the resistor value until I got close to a single
over/under shoot.

"Optimum" must be viewed in the light of the system requirements.

For a type-II system such as this, critical damping puts both poles at
the same location on the real axis of the S-plane. However, this
results in some peaking on the Bode plot (about 2.something dB, from
memory) due to the action of the zero at exactly half the frequency of
the poles.

For most applications this peaking doesn't matter, and critical
damping results in a good design with reasonably low sensitivity to
component tolerances.

For some applications (such as PLLs used in SONET timing, where the
peaking must be kept to less than 0.1dB) it becomes necessary to have
a heavily overdamped response. This puts both poles on the real axis:
one right next to the zero (where they *almost* cancel - some peaking
is inevitable) and the other at a much higher frequency, which results
in a system that looks like it has a single lowpass pole.
The lock time suffers, of course.

Regards,
Allan.