# PLL loop compensation

Discussion in 'Electronic Design' started by Genome, Dec 5, 2003.

1. ### GenomeGuest

Now I've got an EXOR gate with a gain of X/180 volts per degree

And I've got a VCO with a gain of -j360(Fmax-Fmin)/Xf degrees per volt

I multiply them together and get a gain of

Gbum = -j2(Fmax - Fmin)/f

That's a first order system with a constant 90 degrees phase lag.

Setting the gain of my bum to unity and rearranging gives me the crossover
frequency as

fco = 2(Fmax - Fmin)

Now I'm a simple sort so I'm not going to beat my head over the various
barrels of some such otherwise. I don't know!

You know this is fun. The first loop I ever stabilized was a 4046 one. I
pissed about soldering bits in and out of the piece of shit and it really
fucked me off. Then I read what Horrowitz and Hill said about it..... did
the sums and the bastard worked. I smiled so much the top of my head fell
off.

I will now introduce something called the smegabout. Smegabout is the amount
of jitterybug you want from the VCO and it's something to do with the
ripplyness divided by something else at the input to the VCO.

See... I do not have a basic clue.

Never mind.... I will pick a smegabout figure of 1/100 and that defines the
two resistors that sit in between my EXOR output and my VCO input. I can,
near enough, just set up a voltage divider with the resistor in series with
the output 100 times the one that goes to no volts.

Putting that in the sum gives me

fco = (Fmax - Fmin)/50

I'll call the input thing Fin and I'll set up my VCO so it produces the same
frequency when its input is at X/2. Then I'll pick a crossover frequency of
Fin/10......

OK... My center frequency is Fin and, if my VCO is linear then...

Fmax = Fin + abit
Fmin = Fin - abit

and fco = Fin/10

So

Fin/10 = (Fin + abit - Fin + abit)/50

Fin/10 = 2abit/50

abit = 2.5Fin

So.... I set up my VCO so

Fmax = 3.25Fin

and

Fmin = -1.5Fin

Oooooooooooh Shit! Who said life was easy?

Taking four steps back.......

Fmax - Fmin = 3.25Fin + 1.5Fin

Fmax - Fmin = 4.75Fin

And I'll throw away that idea about it sitting at X/2 when it's happy.

Then I'll set Fmin at Fin/2 which gives me Fmax at 5.25Fin. And it locks
with questionmark volts at the VCO input.

I can't help thinking that there might be a better solution. Knob.

Anyways, having done all that, it's a thing that crosses over at Fin/10
first order. I go and stick a capacitor in series with the resistor to
ground such that its value is something like 1/2piRg(Fin/20) or sum such.

Yazza Yazza Yazza.

NURP

2. ### Winfield HillGuest

Genome wrote...
ROFLOL, more fun than a barrel of monkeys. I imagine.

Thanks,
- Win

whill_at_picovolt-dot-com

3. ### GenomeGuest

That would be ROTFLMAO.

DNA

4. ### Tim AutonGuest

ITWMROFLOLSFY.

YDNNTT.

TAIS.

IHYMASWGBNAGAYD.

Tim

5. ### John LarkinGuest

The VCO is an integrator, at least as far as we (you, me, and the XOR
gate) are concerned.

Suppose we had a vco with a sensitivity of 1 MHz/volt. It drives an
xor phase detector powered by vcc, and suppose the reference freq is
the same as the vco freq. Now whack the vco input by one volt, and you
get a 1 MHz triangle wave out of the xor (plus some hf trash which
we'll ignore.) So the integration constant is 1e6 * 2 * Vcc, or
kvco*2*vcc to be academic. So this

in---------vco------------xorin
xorout--------out
refosc---------xorin

has a transfer function of 2*vcc*kvco/s,

where s is the integration operator and where xorin is pronounced
'whoring'.

That has a 90 degree lag at all freqs, but also a declining gain as
1/f. So if you close this loop with a simple r-c lowpass filter, it
rings like a bandit, or more likely oscillates.

But because it's an integrator, it's fairly insensitive to ripple on
the vco control voltage, so high-frequency ripple at the filter output
tends not to be a big deal.
Smegabout isn't just a linear thing because of this 1/f rolloff, so
jitter will be better than the ratio of the resistors in the filter...
much, much better if kvco is small, like for an LC or especially a
crystal oscillator. In a crystal oscillator PLL, you can often get by
with no lowpass filter at all, which is sure nice for loop dynamics:
all that's left is negative feedback onto an integrator.

Or something like that, within a factor of 2*pi or so, conditional on
Chardonnay content.

John

6. ### GenomeGuest

Yeah, I almost believed/knew that but I feel a bit iffy about spuking out
the sum without being able to justify it. You will guess that my maffs is
crap and I can't take things at face value........

I'll give it another go.

My VCO has a gain of (Fmax - Fmin)/X hertz per volt. I want to convert that
to degrees per volt. Now, if I sit about and count the number of degrees
that have gone by I get the impression that time comes into things. If I'm
counting then perhaps my VCO is doing the same and it's called intygrating.

Fair enough?

So now my VCO gain becomes Pickatime(Fmax - Fmin)/X pickanangledefinition
per volt. Pickatime is 1/frequency so my VCO gain becomes (Fmax-Fmin)/Xf
pickanangledefiniton per volt. One lot of oscillation is 360 degrees which
defines my pickanangle so my VCO gain becomes 360(Fmax - Fmin)/Xf degrees
per volt.

Now.... at the moment I can't justify throwing in the 90 degrees phase lag
of a -j without just saying that things that go at 1/f just have that one
associated with them.
Errrr..... that would be a 'square' wave, not exactly but you get the
picture?(I'm a fucking pedant me) Back on the party. My XOR gate gain was
X/180 volts per degree so I multiply them together and get what I said
before -j2(Fmax - Fmin)/f. Which agrees with what you are saying, kind of.

This is the thing about these things, you work out all the bits in between,
dibble about with it and bung something else in....
If you want to be a bit more solid about kvco. I mean..... you can't just
puke out stuff without justifying it.
Where s is the obsfucation operator...... as used by..... Narf, s is jw and
w is 2pif.

Well, that would be me minus j....... which I still can't prove other than
the fact it's a 1/f thing.

What you mean to say is a voltage divider does VOUT = VIN.RG/(RIN + RG)
Where RIN is in series with the EXOR output and RG is the one down to
ground. If you replace RG with a capacitor then you deal with XC, impedance
of the capacitor. XC is 1/j2pifC or 1/jwC or 1/sC....

Lazy bones, lying in the sun, how you going to get the days work done?

Now, I can sort of believe in a capacitor having a -j between its volts and
its amps.

In the limit (maniacal larf) above the frequency where the capacitor has the
same impedance as the resistor the thing reduces to VOUT = VIN.XC/RIN or
something like -jVIN/RIN2pifC

And that -j gives me another 90 degrees of phase shift. Add that to the 90
ones from the VCO and things hit 180. It's a feedback loop so I adds the 180
to get 360 and it's unstable.

Mind you...... I might be a bit wicked and set the corner frequency of me RC
filter at half the dooo daah and have a stable one.
Perhaps I was worrying unecessarily, like I said 'I'm Clueless'.... Mind you
I don't thick the 'it's an integrator' argument cuts it. The best I can
dribble is that 'it makes its decision at the same point of the ripple'....
or some such.

DNA

7. ### Winfield HillGuest

Genome wrote...
Surely it's a simple matter of tetragametic chimera fusion.
Multiple types of DNA, in a true Genome conglomeration.

Thanks,
- Win

whill_at_picovolt-dot-com

8. ### Jim ThompsonGuest

Sheeesh, Win, You live such a sheltered life. Surf on "smega' and see
what you get ;-)

...Jim Thompson

9. ### Winfield HillGuest

Jim Thompson wrote...
OK. Southwestern Michigan Economic Growth Alliance?

Smega Technologies (thermostats, thermocouples, etc.)?

Europe's Accounting and Financial Reporting Guidelines
for Small and Medium-sized Enterprises (SMEGA)?

Thanks,
- Win

whill_at_picovolt-dot-com

10. ### Jim ThompsonGuest

ROTFLMAO!

...Jim Thompson