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PIC I/O lines when configured as input or output

Discussion in 'Microcontrollers, Programming and IoT' started by Rajinder, Feb 10, 2019.

  1. Rajinder

    Rajinder

    349
    6
    Jan 30, 2016
    Hi,
    I am trying to understand what happens 'internally' (on a hardware level) to a PIC I/O line when it is configured as an input / output or high impedance.
    I know that there are N and P channel FETs which are set accordingly when the port is set i.e. to sink or source current.
    I need a better understanding. Can anyone help?
    Thanks in advance
     
  2. Harald Kapp

    Harald Kapp Moderator Moderator

    9,032
    1,808
    Nov 17, 2011
    Have a look at figure 4-10 in this datasheet. Do not get confused by the different options shown there. The basic prionciple is the same:

    The port is always an input through the Schmitt-Trigger gate at the bottom of the diagram. The bus driver to the internal dat bus is enabled by the signal RD_PORTC when data is read from the pin.

    When configured as output, the ouput driver is enabvled by the control signal from the lower flip-flop that stores the enable signal for that port pin using the WR_TRISC control signal. How this tri-state bufffer works is explained e.g. here.
     
    Rajinder likes this.
  3. Rajinder

    Rajinder

    349
    6
    Jan 30, 2016
    Thanks for your assistance. I will have a good look at the articles. Much appreciated.
     
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