John said:
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It's twofold in that if you don't have, everywhere, a stable reference
for zero volts (ground) then you can't predict what effect your signal
will have on the output you want. For example, let's say that you have
a comparator with one input sitting at a voltage referenced to ground
and the other input set to switch at 1 volt. If the reference's ground
is moving around because it's sitting on a ground which varies from
-10mV to +10mV, then its output is going to be moving around as well,
and you won't be able to tell whether the comparator's output is
switching at 990mV, 1010mV, or anywhere in between. If you have a
massive ground, then when currents are drawn through it the voltage
drops across it will be small because the resistances between the points
where current are flowing will be small, and the voltage drops due to
the currents flowing through those resistances will be small.
Likewise, if you have, say, a chip which is drawing a large current from
the supply and it has a high-resistance path to the supply because of
narrow power supply traces on the PCB on which it's mounted, then the
voltage dropped across those traces will not be available to the chip
for it to do what it's supposed to do.
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Yes, but _where_ you decouple supply from ground is more important than
just blindly throwing caps around.
The aim of decoupling is to fool everything on the PCB into thinking
that it's so important that it's connected to its own infinitely
compliant power supply, and that's done by placing a device (a
capacitor) capable of storing the energy the device (the chip) needs to
function properly, short term, across the supply terminals of each chip
which needs help. By doing that, the instantaneous high-current needs
of the chip will be supplied by its own capacitor reservoir instead of
the primary supply and the horrible power supply wiring leading up to
the chip, and when the needs of the chip subside, the capacitor will
charge up for next time through the wiring which now doesn't look so
bad...
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Yes, they'll parallel up to 0.1µF, and it'll be the main supply's job to
keep them charged up (through the PCB's traces, of course) well enough
to allow the chips which they're connected across to function at
whatever frequency they need to work at.
Now that John made a splendid cake, allow me to add some icing to it...
The effectiveness of decoupling capacitors has - oddly enough - a lot to
do with inductance. Stray inductance, that is. That is the inductance of
the wiring connecting the capacitor to the power consumer. Say the power
consumer is an IC with a ground pin and a power supply pin.
An inductor, remember, wants to keep the current through it constant. If
you attempt to change the current, the inductor will develop a voltage
to counteract this. The net result is that you can not change the
current instantaneously.
Compare that with the behaviour of a capacitor. A capacitor wants to
keep the voltage across it constant. If you attempt to change the
voltage, the capacitor will develop current to counteract this.
So if your IC (the power consumer) consumes constant current, you don't
need any decoupling, as the stray inductance has no effect. If, however,
the current varies over time, the inductance will counteract this. If
the IC wants to increase its current consumption, the inductance will
develop a voltage to counteract it, meaning it will reduce the IC's
supply voltage. If the IC wants to reduce its current consumption, the
inductance will correspondingly increase its supply voltage.
The IC's supply voltage, that is the voltage between its power supply
pin and its ground pin. Or, more precisely, the voltage between its
power supply pads and the ground pad. Pads are the connections on the
silicon chip itself. The pins are connected to the pads using wires
inside the chip package, so there is some inductance already between pad
and pin. When very fast current changes are involved, this little
inductance matters, too.
It goes without saying that those changes in a chip's supply voltage are
bound to disrupt its desired operation once they exceed a certain
margin. The actual margin depends on the situation, of course, but in
nearly all cases it will matter to some extent.
The wiring inductance between our IC and the power supply is bound to be
fairly high. This is unavoidable because the power supply will be at
some distance from the power consumers. The cure is therefore to provide
some local "interim" power source that is not affected by the wiring
inductance. This is what bypass capacitors are doing. For their
effectiveness it is essential that the inductance between them and their
respective power consumer is minimal.
Actually it is the inductance *and* the resistance that need to be
minimized, because both reduce the effectiveness of the bypass
capacitor. The resistance is easier to deal with than the inductance,
though.
So what can we do to reduce the inductance? You need to be conscious of
what causes it. A straight wire already has inductance, so you want to
reduce wire length. A wire loop has an inductance that depends on the
loop area, so you want to reduce the loop area. If you can not make the
loop shorter, you can still reduce the area by running the wires close
to each other (the wire to and the wire fro, that is). Besides reducing
the inductance, that also has the effect that less energy is radiated
into space (the loop is also an antenna).
So proper placement of a bypassing capacitor for our IC would be
straight across its power supply pins, so that the loop formed by the IC
and the capacitor circumscribes a minimal area. If you're doing a PCB,
you want to arrange the wiring on the PCB so that this situation is
approximated as well as possible.
Of course, a real world circuit has such a lot of power consumers that
it would amount to a lot of work to figure out what all the loops are
like and minimize them. Enter the ground (and power) plane. If the wires
are actually planes, as in a multilayer PCB, you do not need to figure
out the loop areas for all possible currents, as the currents
automatically choose the path of least impedance. Note my switch of
terminology from inductance to impedance. In the DC case (currents are
constant) the impedance is equivalent to the resistance. DC currents
therefore choose the path of least resistance. At higher frequencies
(alternating currents) the inductance gains more and more prominence, up
to the point where resistance does not matter anymore.
So a power plane allows the currents to choose the best path themselves,
for *any* frequency. So while a plane is not really *necessary*, it
saves you a lot of work figuring out all the loops in order to minimize
them.
For example, if you have a ground plane and above it a power wire
zigzagging about. A DC current will now choose the direct path in the
ground plane. A high frequency current however will zigzag in the ground
plane in parallel to the power wire, because that yields the smallest
loop area. By having a ground plane you allow this to happen. If you had
a single ground wire instead, you would predetermine the current path
(and thus the loop area) for all frequencies.
Cheers
Stefan
