Maker Pro
Maker Pro

Paralleling Mosfets in smps for Cooler Operation

J

Joerg

Jan 1, 1970
0
Klaus said:
I think the issue of oscillation using paralling MOSFETs is relevant
when you operate in the linear mode of the MOSFET. When you drive it
hard on, then there should be no problem (the internal of a trench
MOSFET is parallel devices, isn't it?)

Yes. However, they can send off brief bursts of oscillation during the
transition. I had that at a client even though they used only switcher
modules from reputable manufacturers. I did pre-compliance tests and
mods there. After being happy with the margins I told them to line up
the EMC lab session. There, they failed. Turns out they had changed
manufacturers on the switcher and the unit sent to the lab had that new
type in there. This was why they failed.

The new switcher was letting off 260MHz "birdies" which was the highest
I've ever seen on a switch mode supply. Almost total silence on the
analyzer and then a tall "forest" around that frequency. A shield over
that switcher and some ferrite fixed it. I couldn't improve the switcher
design itself because it would have voided its TUEV/UL cert.

In a current design we are using 8 small MOSFETs in parallel instead
of one big MOSFET. The losses are lower even though the resulting
RDSon is the same, since the MOSFETS cool to the PCB (so there is less
thermal resistance) and there is no hotspot on the PCB (there was
before since the PCB has significant thermal resistance). Since the
hotspots are gone, the individual MOSFET runs cooler. Remember RDSon
is about 2 times larges for a MOSFET running hot). Lastly, we can
avoid the heatsink, since the MOSFETs are distributed on the PCB to
allow the entire PCB to act as a heatsink.

That is smart. Often the cost of seven additional FETs that are smaller
is lower than the heat sink because labor is involved. Did you get away
without gate resistors? No birdies on transitions?
 
A

Andrew Edge

Jan 1, 1970
0
How does a zener do that?

John

Oscillation derives from rapid transients which bring about
interactions between L,C parasitics in the circuit and a tendency of
a MOS to get more current then others and hence be switched ON.
The voltage dependent capacitance of the Zener works against that
at least at the lower frequencies after which it becomes inductive
and makes things worse. They are some skeptics though who claim it
always makes things noisier. However its presence is a bonus as it
protects against high voltage transients.

Andy
 
K

Klaus Kragelund

Jan 1, 1970
0
KlausKragelundwrote:


Yes. However, they can send off brief bursts of oscillation during the
transition. I had that at a client even though they used only switcher
modules from reputable manufacturers. I did pre-compliance tests and
mods there. After being happy with the margins I told them to line up
the EMC lab session. There, they failed. Turns out they had changed
manufacturers on the switcher and the unit sent to the lab had that new
type in there. This was why they failed.

The new switcher was letting off 260MHz "birdies" which was the highest
I've ever seen on a switch mode supply. Almost total silence on the
analyzer and then a tall "forest" around that frequency. A shield over
that switcher and some ferrite fixed it. I couldn't improve the switcher
design itself because it would have voided its TUEV/UL cert.


That is smart. Often the cost of seven additional FETs that are smaller
is lower than the heat sink because labor is involved. Did you get away
without gate resistors? No birdies on transitions?

Well actually we only have RDS losses since they are used to switch on
a mains load. We have 4 MOSFETs in parallel and another 4 MOSFETs in
parallel to act as two big MOSFETs in series to allow for bi-
directorial switch (ac load). One cluster of MOSFETs share the same
100k gate resistor (we turn on in about 1ms), the other cluster share
another 100k resistor. We have seen no problems, but I must admit that
due to schedule problems we have not yet have time to investigate
fully. The reason for having two gate resistors is to avoid fast
pulsen to migrate through the DS path to the other MOSFET cluster
gates.

Regards

Klaus
 
J

Joerg

Jan 1, 1970
0
Klaus said:
Well actually we only have RDS losses since they are used to switch on
a mains load. We have 4 MOSFETs in parallel and another 4 MOSFETs in
parallel to act as two big MOSFETs in series to allow for bi-
directorial switch (ac load). One cluster of MOSFETs share the same
100k gate resistor (we turn on in about 1ms), the other cluster share
another 100k resistor. We have seen no problems, but I must admit that
due to schedule problems we have not yet have time to investigate
fully. The reason for having two gate resistors is to avoid fast
pulsen to migrate through the DS path to the other MOSFET cluster
gates.

Wow, 100K sounds really high. I don't know the application but couldn't
it use a triac, or two SCRs if there is lots of inductive load?
 
D

D from BC

Jan 1, 1970
0
It would be helpful if you told us the MOSFETs and drivers
you are using, and some of the other operating parameters.

I started off with the TPS2817 mosfet driver (2A peak output) with a
SPA21N50 Rds(0.19) Qgt=95nC
(I have to admit, I tried to skip the math and just picked a low Rdson
mosfet..I later learned that this may not be best for my app.)
Calculated total power loss is 3.7Watts...

Mosfet Conditions
Id=2.4Apeak
Vd=270Vpeak
f=100khz, D=40%
Continuous mode Cuk topology

I was thinking of going "Rambo" :) and using
2 parallel Fairchild Superfets FCPF7N60 (rds=0.53, Qgt=25nC) with a
IXYS IXDD414 (12A peak output) driver...
Cooler??
This is more in the interest of how cool can I go.. :)

Just about all fets in the VDMOS library of LTspice have Rg=3ohms? Is
this accurate? Is it all the metal leading up to the gate?.
If so, this limits the peak current from those impressive high Iout
mos drivers.. I looked at a few mosfet datasheets for Rg...haven't
found it yet.
D from BC
 
D

D from BC

Jan 1, 1970
0
Take a look at the multiphase converter topology. International
Rectifier (www.irf.com) and Texas Instruments (www.ti.com) make parts
for this approach. Basically, you have a separate inductor for each
mosfet so the current is evenly divided among them. The multiphase
part refers to the fact that they are sequenced to be on at different
times so that the magnitude of the ripple current is less.

Cool...(I mean literally cool... :)
I'll certainly check it out...
D from BC
 
K

Klaus Kragelund

Jan 1, 1970
0
KlausKragelundwrote:


Wow, 100K sounds really high. I don't know the application but couldn't
it use a triac, or two SCRs if there is lots of inductive load?

A previous design used a triac, but I saw the possiblility to make the
power supply extremely simple by using a MOSFET (zero static current
consumption) and changing the system to let the micro run only
periodically and otherwise be in sleep mode. Its 100k because the
state of the MOSFET gate must be valid even in sleep mode (micro holds
the outputs in the correct state), but I need to draw minimum power
from the power supply. The micro runs for 30ms at 10mA and sleeps for
about 250ms. So the average consupmtion of the 5V node to the entire
system is below 2mA

Regards

Klaus
 
J

Joerg

Jan 1, 1970
0
Klaus said:
A previous design used a triac, but I saw the possiblility to make the
power supply extremely simple by using a MOSFET (zero static current
consumption) and changing the system to let the micro run only
periodically and otherwise be in sleep mode. Its 100k because the
state of the MOSFET gate must be valid even in sleep mode (micro holds
the outputs in the correct state), but I need to draw minimum power
from the power supply. The micro runs for 30ms at 10mA and sleeps for
about 250ms. So the average consupmtion of the 5V node to the entire
system is below 2mA

Yes, the drive level can be taxing with triacs. But MOSFETs should never
draw any gate current so I guess you could use much less than 100K.

I once saw the opposite strategy. Someone had cost-reduced the power
supply to the bones by dropping any kind of regulation. No regulator, no
zener, just one resistor. Problem was nobody told me. So when something
didn't work I probed the uC crystal to see whether it was still humming
along. Phssst ... poof. They had obviously made sure that the uC
workload and thus its current draw was very even all the time so VCC
would fall between min and max datasheet values. Touching the oscillator
pin must have made it stop.
 
J

jasen

Jan 1, 1970
0
On Wed, 14 Feb 2007 18:28:31 -0800, Joerg

[snip]
Your best friend is the scope. Check out what happens upon turn-on and
turn-off. Also across the Isense resistors (hoping there is one). That
gives you a good indication of whether something is out of whack. Make
sure you don't fry it with any spikes. If in doubt use a resistive
divider so some more sane voltage level.
[snip]

Huhhh...I wish ...I made a damn offline smps.
Can't scope ground it or poof! But it's gotta be done...
(Using a Hickok scope from 1968!! Only 8 knobs :)
I think I have to buy a >100W power transformer (or equivalent
transformer combo) to isolate the smps supply under test. That's going
to cost $$$.

see what you can get at the recycling place, before the invention of the
RCD/GFCI isolating transformers were an essential piece of contractor
equipment and they were built to last.

Last year I got a 1500VA one for $12,
Or brainstorming ideas such as:
Make an optocoupler probe..
Make an op amp differential probe..
Make HF transformer probe..
Buy an isolated digital scope

check what's being chucked first.
 
D

D from BC

Jan 1, 1970
0
On Wed, 14 Feb 2007 18:28:31 -0800, Joerg

[snip]
Your best friend is the scope. Check out what happens upon turn-on and
turn-off. Also across the Isense resistors (hoping there is one). That
gives you a good indication of whether something is out of whack. Make
sure you don't fry it with any spikes. If in doubt use a resistive
divider so some more sane voltage level.
[snip]

Huhhh...I wish ...I made a damn offline smps.
Can't scope ground it or poof! But it's gotta be done...
(Using a Hickok scope from 1968!! Only 8 knobs :)
I think I have to buy a >100W power transformer (or equivalent
transformer combo) to isolate the smps supply under test. That's going
to cost $$$.

see what you can get at the recycling place, before the invention of the
RCD/GFCI isolating transformers were an essential piece of contractor
equipment and they were built to last.

Last year I got a 1500VA one for $12,
Or brainstorming ideas such as:
Make an optocoupler probe..
Make an op amp differential probe..
Make HF transformer probe..
Buy an isolated digital scope

check what's being chucked first.

I've been poking at the idea of getting a Tektronics digital phosphor
oscilloscope..
But....
I can get a iso transformer off Digikey for about $50.00CAD.
(Not sure if there will be added shipping charges due to weight..
I added to my Digi order to see but no change..still $8.00CAD..??
Suspect transformer price has been bumped to compensate for shipping.)
But first, I'll check my local electronics surplus depot for a
transformer.
Bring a cart with wheels to carry it? :)
D from BC
 
K

Klaus Kragelund

Jan 1, 1970
0
KlausKragelundwrote:


Yes, the drive level can be taxing with triacs. But MOSFETs should never
draw any gate current so I guess you could use much less than 100K.

I once saw the opposite strategy. Someone had cost-reduced the power
supply to the bones by dropping any kind of regulation. No regulator, no
zener, just one resistor. Problem was nobody told me. So when something
didn't work I probed the uC crystal to see whether it was still humming
along. Phssst ... poof. They had obviously made sure that the uC
workload and thus its current draw was very even all the time so VCC
would fall between min and max datasheet values. Touching the oscillator
pin must have made it stop.

That sure sounds like a design asking for trouble. But on the other
hand I often think about some of our designs in which we use six-sigma
WC calculations and so on, when a simpler design could work ok with
some figure of failure rate

Regards

Klaus
 
J

Joerg

Jan 1, 1970
0
Klaus said:
That sure sounds like a design asking for trouble. But on the other
hand I often think about some of our designs in which we use six-sigma
WC calculations and so on, when a simpler design could work ok with
some figure of failure rate

It sure does but supposedly it worked with a low failure rate. Don't
remember if it was this one but I've seen a uC fed via an input pin,
using the substrate diode as a rectifier. Probably to save another cent.
That reduces the number of components that could fail by one so I guess
it could fall under Taguchi's "creativity" function. Of course, the core
motivation could also have been plain old greed ;-)
 
K

Klaus Kragelund

Jan 1, 1970
0
KlausKragelundwrote:


Yes. However, they can send off brief bursts of oscillation during the
transition. I had that at a client even though they used only switcher
modules from reputable manufacturers. I did pre-compliance tests and
mods there. After being happy with the margins I told them to line up
the EMC lab session. There, they failed. Turns out they had changed
manufacturers on the switcher and the unit sent to the lab had that new
type in there. This was why they failed.

The new switcher was letting off 260MHz "birdies" which was the highest
I've ever seen on a switch mode supply. Almost total silence on the
analyzer and then a tall "forest" around that frequency. A shield over
that switcher and some ferrite fixed it. I couldn't improve the switcher
design itself because it would have voided its TUEV/UL cert.


That is smart. Often the cost of seven additional FETs that are smaller
is lower than the heat sink because labor is involved. Did you get away
without gate resistors? No birdies on transitions?

Actually it might even be cheaper since the qoute now goes 8up, the
package is a more common one (high runner) avoiding an expensive bulky
MOSFET and lastly if you need you can just remove half of the MOSFETs
if you have a lower current product variant.

Regards

Klaus
 
Top