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Paralleling Mosfets in smps for Cooler Operation

Discussion in 'Electronic Design' started by D from BC, Feb 14, 2007.

  1. D from BC

    D from BC Guest

    Can a 100khz converter get less hot with paralleled mosfets?

    I have my single mosfet max'd out due to internal Rg using a Tr=14nS
    gate driver... The heat sink gets too hot in my app.. Can I improve
    the efficiency by paralleling mosfets..?
    (Not using more parts to share the total power loss but reducing the
    total power loss..)

    Paralleling mosfets can reduce the conduction losses to reduce heat..
    But no so with the switching loss. It is just divided among the
    paralleled mosfets..In other words...No efficiency gain.. correct?
    (I suspect I'm wrong on this...but not sure..)

    Also...
    I've read that paralleled mosfets can oscillate..
    A fix is to use gate resistors and or ferrite beads to prevent
    oscillations.
    Wouldn't this slow down the mosfets and create more switching heat?
    Compensate with higher Vg?
    How large are these gate resistors..I can only guess 10 to 30 ohms??

    Do smps designers resort to paralleling while maintaining the same
    switching frequency for a cooler box?
    Maybe paralleled so much that no heat sink is required?
    D from BC
     
  2. Joerg

    Joerg Guest

    Yes :)

    You need to make sure that the driver has enough gusto. If it doesn't
    then the slopes flatten a bit and you might not gain anything, or worst
    case even lose efficiency.

    I won't get into that battle of opinions again. It's like arguing ground
    planes. Or, ahem, politics.

    While a gate resistor or bead can avoid oscillation they may not be
    necessary with clever placement and layout. I usually was able to do it
    sans resistance. A gate resistor will cost you in switching losses. To
    me they often look like taking Maalox everyday (some people do that...)
    instead of changing to a proper diet.


    This here designer has done that. Many times. Not so much for
    temperature reasons but for more efficiency.


    Ahm, that would require more data from your side. A lot more data. If
    this is a 5kW switcher I'd be inclined to say no, if it's 5W then
    probably yes.
     
  3. John Larkin

    John Larkin Guest


    Switching losses will increase with paralleled fets, because more
    capacitance means more switching energy dumped. How important this is
    depends on the switching freq and such.
    10-30 is a reasonable range to kill birdies.
    Even single mosfets will often make rf bursts on rising/falling edges.
    I'm not sure what determines this, but there's no obvious (to me)
    relationship between "good" and "bad" layouts here.


    John
     
  4. Joerg

    Joerg Guest

    True. It will increase the losses in the driver itself because it has to
    charge more capacitance. What I meant were the losses caused by sluggish
    transitions if the driver he has now is a bit too wimpy for more than
    one FET.
    Agree. But for a big FET that carries a penalty.
    A big sin is sloppy layout at the drain node. Long traces that are too
    thin and stuff like that. Same for long gate traces, those can cause
    real grief. Most "singing" that I noticed was due to that. It can also
    happen when the driver is wimpy and can't hold the gate up while the
    drain node roars down. In one case they didn't want to change the parts
    placement and there wasn't any space to begin with except for a gate
    trace of 1/2" or so. I put a pnp/npn follower there which made a huge
    difference and also notched up the efficiency by a couple percent.

    Another factor is the transformer/inductor. In most cases I wasn't happy
    with catalog parts and we rolled our own. Surprisingly that often ended
    up being cheaper for production than the catalog part (when made in Asia).
     
  5. D from BC

    D from BC Guest

    Wow..that was a fast answer :)
    Thanks...
    This will keep me thinking for awhile..
    Very interesting bit about the gate resistors too..

    About the paralleling up to no heat sink:
    It's for a 130watt Cuk converter running at 100khz.
    Maybe it's possible to "make a heat sink out of mosfets" :)
    I could prepare a LTspice file and put on my website for download?

    Heat sinking question:
    My estimated mosfet total power loss is 3Watts at 25C on paper.
    I suspect my single mosfet heats up due to switching loss causing
    Rds(on) to rise leading to more conduction loss.. Heat making heat.
    Does this happen?
    Efficiency depending on heat sink quality?

    D from BC
     
  6. Joerg

    Joerg Guest

    A schematic would be nicer but I won't have much time since I am in the
    middle of a large design. With digital stuff in there, yuck...

    But maybe someone else can take a look at it.

    I can't imagine that happening unless you are smoking them. But quite
    frankly I wouldn't want to run that without any heat sink. Can't you
    bolt them to the chassis via isolation layers? While maintaining safety,
    of course.
     
  7. John Larkin

    John Larkin Guest

    Inductors and transformers are like sheet metal and heat sinks, often
    a lot cheaper for custom parts than for catalog stuff. That's kinda
    counter-intuitive.

    Tried Minntronix? Excellent magnetics house. Ask for Butch.

    John
     
  8. Joerg

    Joerg Guest

    Not yet but after a recent post from you I added that link to my wiki.
    It's always good to know a source that others were happy with. Right now
    it's mostly optics stuff I am doing but there sure will be more
    transformers. Then I'll ask for Butch. And whether there are any of
    those cookies left...
     
  9. D from BC

    D from BC Guest

    I used a crappy temporary heat sink on the mosfet (1/2"x 4"x 1mm
    aluminum strip) for out of the box bench testing. No grease.
    The top of the TO220FP case almost reached 100C after 1minute.
    Then I unplugged it..So that's go me freaked..
    The control is stable.
    It does get bolted to a thick aluminum extrusion once fully assembled.
    I was just trying a crude way of evaluating efficiency with the temp
    heat sink.
    I did think about dumping the whole smps in water and measuring a
    temperature rise..

    I should be able to research the rest confident that it's not a dead
    end road. I'll work on the math for optimum mosfet specs for
    paralleling and make sure gate drive as good as it gets..

    Maybe post some of that yucky digital stuff on here :)
    Thanks again..
    D from BC
     
  10. Joerg

    Joerg Guest


    Well, that sure ain't much of a heat sink. Maybe a wider piece?

    Your best friend is the scope. Check out what happens upon turn-on and
    turn-off. Also across the Isense resistors (hoping there is one). That
    gives you a good indication of whether something is out of whack. Make
    sure you don't fry it with any spikes. If in doubt use a resistive
    divider so some more sane voltage level.

    Most of the efficiency problems I saw were due to sluggish turn-on and
    core saturation.


    It's not ready yet. I am wrestling with ADC, DAC, SPI, addressing and
    all that. It is like eating oatmeal soup. I don't like oatmeal soup...
     
  11. Terry Given

    Terry Given Guest

    calorimetry can be a lot harder than you expect.

    its often easier to measure the DC input & output power - if you have
    reasonable input & output filters. if the current is all nasty and
    pulsating, this is not quite so easy.
    one gotcha with FETs is the positive tempco of Rdson. If you dig up a
    copy of the Siliconix MOSPOWER applications book, there is a paper on it
    in there (by Rudy Severns IIRC).

    in a SMPS the FET current tends to be independant of Rdson, os Pfet =
    I^2*Rdson.

    causing dTj

    causing Rdson to increase

    causing more Pfet....

    there is a critical heatsink thermal resistance above which you get
    thermal runaway (little dutch timebomb, tick tock boom)

    below Rtheta_kaboom, it doesnt run away, *but* the junction temperature
    will end up higher (sometimes a lot) than you expect.

    For a prototype, just use a monster heatsink until you have the whole
    thing running, and can make an efficiency measurement.

    Then try the real heatsink, and make another measurement.

    That'll tell you straight away if its thermal runaway (kaboom) or
    thermal step-away (efficiency drops, Tj higher than you expect)


    Cheers
    Terry
     
  12. D from BC

    D from BC Guest

    On Wed, 14 Feb 2007 18:28:31 -0800, Joerg

    [snip]
    [snip]

    Huhhh...I wish ...I made a damn offline smps.
    Can't scope ground it or poof! But it's gotta be done...
    (Using a Hickok scope from 1968!! Only 8 knobs :)
    I think I have to buy a >100W power transformer (or equivalent
    transformer combo) to isolate the smps supply under test. That's going
    to cost $$$.

    Or brainstorming ideas such as:
    Make an optocoupler probe..
    Make an op amp differential probe..
    Make HF transformer probe..
    Buy an isolated digital scope
    D from BC
     
  13. D from BC

    D from BC Guest

    Those sneaky mosfets.. :)

    I'll try a Pin Pout measurement/comparison to see if I'm getting
    mysterious losses..
    The continuous mode Cuk has easy waves to work with..
    Triangle Iin& Iout currents and Vin has 120Hz ripple and Vout is
    nearly DC.
    Thanks
    D from BC
     
  14. Terry Given

    Terry Given Guest

    when I test smps I power them up from a lab supply (to smps startup)-
    this lets you check your feedback loop (use another supply to crank up
    the output, at the desired setpoint your duty cycle should drop to
    zero), gate drive, oscillator etc.

    Then use another lab supply to slowly wind up the DC bus. If you
    scalethe switching frequency down, you can organise for the right peak
    current in your magnetics, and therefore test for saturation.


    or get really keen and get a variac (I bought a big 3-phase variac,
    dismembered it and sold one phase for slightly more than I paid for the
    entire unit).

    light bulbs are also very handy, and cheaper than exploding FETs

    its low power, so scab a pair of transformers from something, and hook
    them up sec-to-sec.

    I've got a 2.5kW isolation transformer I bought from a 2nd hand store
    for about $25.

    waste of time really. besides, when looking at a nasty waveform, how can
    you tell if its the circuit or your probe?
    the new Tek scopes are fabulous in this regard.
    Cheers
    Terry
     
  15. D from BC

    D from BC Guest

    I didn't like any of my probe ideas either..
    So it's down to surplus pwr xformers or new scope..
    Mmmm chunk of iron...or new toy... :)

    D from BC
     
  16. I think the issue of oscillation using paralling MOSFETs is relevant
    when you operate in the linear mode of the MOSFET. When you drive it
    hard on, then there should be no problem (the internal of a trench
    MOSFET is parallel devices, isn't it?)

    In a current design we are using 8 small MOSFETs in parallel instead
    of one big MOSFET. The losses are lower even though the resulting
    RDSon is the same, since the MOSFETS cool to the PCB (so there is less
    thermal resistance) and there is no hotspot on the PCB (there was
    before since the PCB has significant thermal resistance). Since the
    hotspots are gone, the individual MOSFET runs cooler. Remember RDSon
    is about 2 times larges for a MOSFET running hot). Lastly, we can
    avoid the heatsink, since the MOSFETs are distributed on the PCB to
    allow the entire PCB to act as a heatsink.

    Regards

    Klaus
     
  17. It would be helpful if you told us the MOSFETs and drivers
    you are using, and some of the other operating parameters.
     
  18. Andrew Edge

    Andrew Edge Guest

    At the frequency you are working at it, it is normal usage to place a
    Zener between the gate and source in bridge based switchers to reduce
    the oscillation problem.
    If overheating worries you so much
    use MOSFETS with inbuilt protection circuitry. The PHILIPS TOPFET
    range (BUK100 ) has thermal protection incorporated, and probably
    protection against short circuits and other stuff too.

    For paralleled use though derate the current rating by 20% for 2 MOS's
    and as you add more increase that. Differences between them will lead
    to different currents flowing in them. Though this isn't a big problem
    in most cases because of the positive temperature coefficient of the
    drain to source gates, be prepared for the worst.

    Andy
     
  19. Take a look at the multiphase converter topology. International
    Rectifier (www.irf.com) and Texas Instruments (www.ti.com) make parts
    for this approach. Basically, you have a separate inductor for each
    mosfet so the current is evenly divided among them. The multiphase
    part refers to the fact that they are sequenced to be on at different
    times so that the magnitude of the ripple current is less.
     
  20. John  Larkin

    John Larkin Guest

    How does a zener do that?

    John
     
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