S
subhendu
- Jan 1, 1970
- 0
Hai
Greetings to you!
This is Subhendu from Han Digital Solution (P) Ltd., Bangalore.
We, Han Digital Solution provide dedicated placement services to
Product base IT clients based in India and Overseas.
R & D Designs Engineer
Job description
-Candidate should have more than 4 years of relevant industrial
experience in layout designs of Standard cells, IO's, Analog blocks in
the latest nodes.
-Skill involve interpretation of electrical specification for the IP,
the use of CAD layout, modelling and rules checking tools, such as GYM
(memory cell work), Cadence (currently using Cadence Release 5.1,
primarily using Virtuoso layout and schematic editors) (experience
with prior Cadence Releases is acceptable),
-DRC, LVS and METH checking, cell or circuit auto-routing tools
(Cadence CCAR) and possibly the use of Specter (ADE (formerly Analog
Artist) and MDL) and/or HSPICE simulation modeling and StarRC
extraction tools or experience with similar tools..
-The assignment may also involve the creating of a variety of industry
standard and IBM specific higher level logic design rules, including
physical placement and timing rules.
Desired experience : 3 to 8 Years
Required skills
-- Layout design/Circuit design of std. cells, IO´s, Custom Arrays
-- Electrical spec understanding/conversion to layouts
-- Industry standard tools
-- Electrical, Electronics disciplines. M.Sc. Electronics, M.Sc.
Physics with Electronics and or Solid State
If you find this position interesting, Please forward your detailed
"Updated Word Formatted Resume" mentioning the following details given
below:
1. Present CTC :-
2. Expected CTC :-
3. Notice period :-
Thanks & Regards
Subhendu
Han Digital Solution (P) Ltd
#490,8th Cross 10th Main ,
HAL 3rd Stage,
Bangalore -500 085
Ph: 91-80-4125-5585/95
Greetings to you!
This is Subhendu from Han Digital Solution (P) Ltd., Bangalore.
We, Han Digital Solution provide dedicated placement services to
Product base IT clients based in India and Overseas.
R & D Designs Engineer
Job description
-Candidate should have more than 4 years of relevant industrial
experience in layout designs of Standard cells, IO's, Analog blocks in
the latest nodes.
-Skill involve interpretation of electrical specification for the IP,
the use of CAD layout, modelling and rules checking tools, such as GYM
(memory cell work), Cadence (currently using Cadence Release 5.1,
primarily using Virtuoso layout and schematic editors) (experience
with prior Cadence Releases is acceptable),
-DRC, LVS and METH checking, cell or circuit auto-routing tools
(Cadence CCAR) and possibly the use of Specter (ADE (formerly Analog
Artist) and MDL) and/or HSPICE simulation modeling and StarRC
extraction tools or experience with similar tools..
-The assignment may also involve the creating of a variety of industry
standard and IBM specific higher level logic design rules, including
physical placement and timing rules.
Desired experience : 3 to 8 Years
Required skills
-- Layout design/Circuit design of std. cells, IO´s, Custom Arrays
-- Electrical spec understanding/conversion to layouts
-- Industry standard tools
-- Electrical, Electronics disciplines. M.Sc. Electronics, M.Sc.
Physics with Electronics and or Solid State
If you find this position interesting, Please forward your detailed
"Updated Word Formatted Resume" mentioning the following details given
below:
1. Present CTC :-
2. Expected CTC :-
3. Notice period :-
Thanks & Regards
Subhendu
Han Digital Solution (P) Ltd
#490,8th Cross 10th Main ,
HAL 3rd Stage,
Bangalore -500 085
Ph: 91-80-4125-5585/95
