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Odd flip flop

Discussion in 'Electronic Design' started by Nicholas Sherlock, Apr 30, 2006.

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  1. Hey all,

    I'm looking for an odd flip flop, and I'm not sure exactly which one is
    the right one to use. I'm trying to detect rising edges on an input
    using a slow CPU. It's important that I don't miss any rising edges, so
    I can't just poll the input with my CPU to see if it has changed since I
    last checked (It might go high and back low again before my CPU
    rechecks!). It is not so important if my CPU can't distinguish between
    two rising edges since the last check or just one rising edge since the
    last check, but it is important that no edges are missed.

    What I hope that I could do is have something like a SR flip flop. I
    would connect my input to the Set line, and connect the CPU's
    acknowledge line to the Reset line. On a rising edge from the Set line,
    the flip flop would output a logic 1. Eventually, the CPU would read the
    value from the flip flop. If the value read was a 1, the CPU would bring
    the Reset line high in preparation for another rising edge, and the
    output would fall to 0.

    What I am concerned about is the case where Set is high, the CPU raises
    the Reset line to acknowledge the edge, and while the Reset line is
    still high, another edge arrives at the input line. I would like this to
    cause the output to go high, but in the SR flip flop that I know about,
    this would make no change in the output.

    How do I arrange my gates to get the required result?

    Cheers,
    Nicholas Sherlock
     
  2. Sorry, now that I consider it more carefully, I don't need to detect
    retriggers while the the CPU is acknowledging the edge.

    Thanks anyway :)

    Cheers,
    Nicholas Sherlock
     

  3. Your reasoning is not clear to me. You don't worry when two (or more?)
    rising edges appear between two checks of the CPU although IMHO you missed
    the first edge of the two. But when an edge appears during you resetting the
    flip flop it seems to be a problem. What about you resetting the flip flop
    when the input is still high? Does your CPU has an interrupt input that can
    take care of these signals? What speeds are you talking about? A good
    solution requires these things to be taken into account.

    petrus bitbyter
     
  4. Mochuelo

    Mochuelo Guest

    Some options:
    1) Use a D-flip flop, like 1/2 of a 4013, and connect:
    - CL input to your signal to be observed.
    - D to logic 1.
    - S to logic 0.
    - R to MCU_ack.
    - Q to MCU_read.
    - Q_bar open.

    If the shortest pulse that the MCU is able to produce at pin "MCU_ack"
    is too long for you (and you think you are going to miss some rising
    edges at "CL" while "R"=1), you can insert a monostable between
    "MCU_ack" and "R," so that no matter what is the duration of the pulse
    generated by the MCU, the pin "R" of the D-flip flop will always be
    excited with, say, 180 ns (which is the minimum reset pulse width @ 5
    V for the Fairchild CD4013. Notice also that the minimum clock pulse
    width is 200 ns for this IC @ 5 V). You don't even need a resistor and
    a capacitor for the monostable. Just another flip flop that
    autoextinguishes would work (like the other half of the 4013).

    2) If the CPU has an available internal counter which can be clocked
    from an external signal, connect your signal to be observed to the pin
    that clocks the internal counter, and read the counter often enough so
    that there cannot be (or there will usually not be) an overflow of the
    counter between two consecutive readings. The wider the counter (in
    terms of number of bits), the better. With that, you can even count
    how many rising edges have happened since your previous reading. If
    you don't spare an internal counter, but spare input pins, you can use
    an external counter, like a 4040. The problem with this is that you
    could read exactly while the counter is changing from one state to
    another, and so you could read an invalid count value.

    Best,
     
  5. Mochuelo

    Mochuelo Guest

    I just read this. Then, a simple D-type flip-flop would work.

    Best,
     
  6. Yes :). You gave some interesting ideas though, I may use them for some
    other tasks.

    Cheers,
    Nicholas Sherlock
     
  7. Is your goal to simply count the number of incomming rising edge pulses, or
    is there timing also important?
    If simply counting is your goal, why not setup a shift register buffer and
    read it out in a batch configuration.
    JTT
     
  8. Andrew M

    Andrew M Guest

    use a counter instead of a flop. just read the cntr and subtract the
    previous value. then you have the best of both worlds.

    -Andrew m
     
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