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NOR Gate Question

Discussion in 'Electronic Basics' started by Bart, Aug 17, 2006.

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  1. Bart

    Bart Guest

    My thinking:
    +5volt logic works usually with a "high" of near 5 volts and "low" near zero
    volts.
    If I'm thinking right, the "inversion bubble" on a NOR gate means that if
    both inputs are "low", the output logic becomes true but is sinking. If
    either input is "high" then the output logic is false and is.....what?
    I just can't get this straight in my head. Any help is appreciated as I need
    a gate where if both inputs are "low" the output goes "high" (+5volts)

    Bart
     
  2. Eeyore

    Eeyore Guest

    You're presumably thinking of TTL ? No-one uses it any more. CMOS 74HC etc
    happily sinks and sources current.

    Graham
     
  3. You are making this more complicated than it needs to be.

    An or gate produces a 1 output, if either OR both inputs are 1. It
    produces a zero output only if both inputs are zeros.

    Most logic is positive logic (1 state is represented by the more
    positive state)

    The ball on the output of the gate is an inverter that reverses the
    state of the output upstream of the bubble.

    So a NOR gate produces a zero if either or both inputs are 1.
    It produces a 1 output only if both inputs are zeros. Just the
    inverted output of an OR gate.

    Yes, you need a NOR gate.
     
  4. Alan B

    Alan B Guest

    Nope. Grab yer TTL data book, and look up the 74LS02. Both inputs low is
    a high output and a source current.
    Low, and sinking. And only false if your application is true=high.
    Reckon you want a NOR gate.
     
  5. DJ Delorie

    DJ Delorie Guest

    Well, it's TTL and CMOS logic, not "+5 logic". But, yes.
    For a NOR gate, the inversion is on the output. So, first consider a
    plain OR gate:

    Either input high, output high. Neither input high, output low.

    Now invert the OUTPUT (which is where the bubble is).

    Either input high, output LOW. Neither input high, output HIGH.



    As an additional example, consider an inverted-input OR (equivalent to
    a nand gate):

    --O\--,--O/--'

    Plain OR: Either input high, output high. Neither input high, output low.
    The above: Either input LOW, output high. Neither input LOW, output low.


    A truth table helps too:

    A B OR NOR AND NAND XOR NXOR
    --------------------------------
    L L L H L H L H
    L H H L L H H L
    H L H L L H H L
    H H H L H L L H

    Just find the column that does what you want, and see which gate that
    is.
     
  6. Bart

    Bart Guest

    Thanks John,
    For heaven's sake, I read many different explanations of the "inversion
    bubble" and logic gates that I read way too much into it. Now I understand
    the shape of an OR gate and NOR gate are the same except for the ball,
    meaning "invert" or reverse the truth table. Seems so simple now. Thanks
    again!
    Bart
    PS: You scare me when you say "most" logic is positive logic. When will I
    know if "negative" logic is inferred?
     
  7. Guest

    Bubbles on the inputs. Example - a 7400 gate (NAND) drawn as an OR
    with bubbles on the inputs. Ampex used to do this is the '70s. I never
    got comfortable with it though it makes sense.

    GG
     
  8. DJ Delorie

    DJ Delorie Guest

    You'll know. One common example is RS-232.

    Plus, the specs say what Vih, Vil, Voh, and Vil must be, usually
    spec'd as maximum or minimum voltages relative to the various
    supply/ground pins.
     
  9. Beats me, but I have come across negative logic a few times. Made my
    head hurt.
     
  10. Guest

    i think u r some what confused

    high and low are two states.since in digital we deal with two states-
    high or low ;1or 0 like that

    for repersenting a high we use +5 volt and for a low we use 0 v and
    we can use
    for repersenting a high we use 0 volt and for a low we use -5 v
    these r all depand upon the logic which we use. dont get confused with
    that


    NOR gate is a gate where both inputs are "low" the output goes "high"
    (+5volts)
     
  11. Alan B

    Alan B Guest

    Damn good question. Like "stratus" said, many times you'll see the bubble
    on the input, which is an indication that the "true" state of that input is
    low. Another example is a "data selector," which, for instance, might have
    three inputs and eight outputs. One of the outputs will go low according
    to the bit pattern of the three inputs - the low output is "true" in that
    it is the line that is selected. This gets really common when creating
    microprocessor controls and such.

    Part of the reason to use negative logic is that the low state is the
    current hog (see the sink and source numbers for your chips), so it pays
    power-wise to have most of the nodes in the circuit high at any one time,
    and only the active (or true) nodes low. Part of knowing whether negative
    logic is used just comes from experience with a circuit.
     
  12. Guest

    Bart wrote:
    NAND


    if you draw a truth table. A,B, What you Want.
    0 0 1
    ....... .......

    Then you'd see AND is a similar pattern, you want NAND. And
    logically, you sohuld guess NAND.

    Also, googling, maybe you can build a NAND with NORs. I seem to recall
    you can build anything from NORs, and probably anything from NAND.

    To put NAND into NORs. Know how to put AND into NORs, and how to put
    NOT into NORs. Feed your AND into a NOT.
     
  13. Jerry R

    Jerry R Guest

    Nope, that'd be a NOR gate (positive locic):

    A B OR NOR NAND
    ----------------
    0 0 0 1 1
    0 1 1 0 1
    1 0 1 0 1
    1 1 1 0 0

    ....jerry
     
  14. Alan B

    Alan B Guest

    I don't know about NOR, but it is correct that NAND logic can be used as a
    building block for any logic circuit, no matter how complex.
     
  15. Guest

    You can use NOR to build a NAND, and vice versa.

    We can convert between OR and AND.
    NOTs getting in the way aren't a problem, becuause we can build NOTs
    from NANDs, and we can build NOTs from NORs.

    I suppose that the "product of sums equation" and alternative "sum of
    products equation" , you get from a truth table , also come from the
    idea that we can use ANDs or ORs. It's the same equation just NOTed
    both sides. I'm rusty though, I learnt this boolean algebra for a short
    period years ago.
     
  16. Guest

    yikes, thanks!
     
  17. How about "Karnaugh Map"? I remember doing a lot with those when I took
    a "computer logic circuits" course (I hope I got the course name right) at
    Drexel University around 1983 or so. If I remember correctly, this
    "combinational logic optimization method" relied upon "minimized sum of
    products" and "minimized product of sums" being similarly optimal, and I
    somewhat remember needing freedom to invert some inputs.

    Keep in mind that inverting the inputs to a NAND gate makes it an OR,
    and inverting the inputs to a NOR gate makes it an AND. (I fairly
    remember that one and I hope I figured out confirming this memory of mine
    to be true!)

    A NOR gate with inputs tied together and a NAND gate with inputs tied
    together is an inverter.

    Going back to the Karnaugh Map method - it generally proposes whatever
    multiple gates to be limited to two "layers". And if the first layer is
    inverting (NAND rather than AND or NOR rather than OR) then the result is
    that you can make both layers of multi-input (2 or more inputs) gates both
    NAND or both NOR, with the second layer being changed from AND to NOR or
    from OR to NAND, and with the first layer being changed from OR to NOR or
    from AND to NAND.

    Hope this helps, even if this is my roughly annual half-answering a
    school homework problem!

    - Don Klipstein ()
     
  18. Guest

    funnily enough I had written "Karnaugh map" then I deleted it. Because
    I remembered that you look at the truth table and derive the product of
    sums or sum of products equation.

    Then you use the karnaugh map. (unless you can do it or the
    corresponding boolean alebra in your head ). The karnaugh map is just
    a tool to help simplify it. It didn't involve any inverting. I think it
    just did some kind of boolean factorization and also, simplfying things
    like 0 OR A , 1 AND A
    I know that AND doesn't change very nicely into NOR.

    A AND B
    = NOT NOT (A AND B. )
    = NOT (NOT A OR NOT B)
    = (NOT A) NOR (NOT B)

    Oh, I see you're onto something
    invert one layer, and you get NOR . But that's not inverting AND into
    NAND.
    (NOT A) AND (NOT B)
    = A NOR B


    googled "product of sums" "sum of products" NAND NOR
    "A sum of products logic expression can be realized by NAND gates by
    replacing ... A product of sums expression can be realized by NOR gates
    by replacing all ... "
    meseec.ce.rit.edu/eecc341-winter2001/341-12-18-2001.ppt

    Looking at that ppt,
    I think you are talking about **double inverting**, so as not to change
    the thing. The SOP or POS never starts off with a NOT over the whole
    thing(the whole outer layer), or over each inner layer. So i'm not
    looking for a NAND or NOR in any layer.

    That is very interesting, I never did that to a POS or SOP.

    And this is for expressions rather than equations. So you're double
    inverting to keep it the same.


    I think I see what you're saying
    Great concept
    based on
    NOT A OR NOT B = NOT (A AND B) i.e. A NAND B
    NOT (A AND B ) = NOT A OR NOT B i.e. A NOR B


    For a product of sums, outer layer = AND, invert the whole thing twice
    and convert to NOR.

    For a sum of products, outer layer = OR, invert the inner layer
    twice, and convert to NAND.

    nice, thanks.

    I don't know if that was what you were saying, but it's very
    interesting!
     
  19. PeteS

    PeteS Guest

    K-maps depend on Sum of products form :

    i.e. Y = ABC + DEF + ... and so forth. This is sometimes also known as
    a minterm.

    product of sums is

    Y = (A + B) * (C + D) * and so forth, where * denotes the AND operator
    (logical multiplication). This is also sometimes known as maxterm.

    For the conversion across base types, use DeMorgan's theorem

    if

    Y = A * B then
    !Y = !A + !B

    You can see this from the truth table, incidentally

    Only AND / OR / INVERT gates can be treated this way (as they are the
    only true priimitives).

    To apply DeMorgan's theorem, invert the output and all inputs, and swap
    all signs from AND <-> OR.

    So a 2 input AND with active high inputs is equivalent to a 2 input NOR
    with active low inputs (assuming 1 = high and 0 = low which is not
    always necessarily true).

    The same can be done for each primitive - a 2 input OR with active high
    inputs is equivalent to a 2 input NAND with active low inputs.

    As one may convert either NAND or NOR to any gate (by the use of
    inverters, which each of those inherently have), they are both known as
    universal gates.
    2 input NAND

    Y = !(A * B) converts to:

    !Y = A + B

    Cheers

    PeteS
     
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