Maker Pro
Maker Pro

nor gate cmos circuit

vead

Nov 27, 2011
473
Joined
Nov 27, 2011
Messages
473
hello
I made Nor gate with coms transistor
please check the connection

If my diagram is correct then I want to decide length and width of transistor ?
still I have not decide width and length I just want to confirm that my diagram is correct ?
 

Harald Kapp

Moderator
Moderator
Nov 17, 2011
13,728
Joined
Nov 17, 2011
Messages
13,728
The source of the PMOS transistors is incorrectly tied to the output. It should go to Vdd.

If you want a more or less symmectrival output you have to take into account that a PMOS has 1/2 the conductivity of an NMOS for the same W/L ratio. Since for a high output you have 2 PMOS in series, you have 1/4 the conductivity of a single NMOS in the pull-down leg of the output (for equal W/L). For a symmetrical output you therefore have to design W/L(PMOS)=4*W/L(NMOS).
The absolute value of W and L depends mainly upon the available technology and max. output current.
 

vead

Nov 27, 2011
473
Joined
Nov 27, 2011
Messages
473
The source of the PMOS transistors is incorrectly tied to the output. It should go to Vdd.

If you want a more or less symmectrival output you have to take into account that a PMOS has 1/2 the conductivity of an NMOS for the same W/L ratio. Since for a high output you have 2 PMOS in series, you have 1/4 the conductivity of a single NMOS in the pull-down leg of the output (for equal W/L). For a symmetrical output you therefore have to design W/L(PMOS)=4*W/L(NMOS).
The absolute value of W and L depends mainly upon the available technology and max. output current.
If pmos =6/1 then nmos will be 3/1
according to your formula W/L(PMOS)=4*W/L(NMOS).

pmos = 6/1 and nmos = 6/2 *4=12/1

circuit is here
 

Attachments

  • upload_2014-9-26_3-11-7.png
    upload_2014-9-26_3-11-7.png
    8.1 KB · Views: 109

Harald Kapp

Moderator
Moderator
Nov 17, 2011
13,728
Joined
Nov 17, 2011
Messages
13,728
pmos = 6/1 and nmos = 6/2 *4=12/1
No.
W/L(PMOS)=4*W/L(NMOS)
Therefore if W/L(PMOS)=6/1, then W/L(NMOS)=6/1 *1/4= 6/4=/3/2

The PMOS needs to be wider than the NMOS for the same conductivity and channel length.
 

vead

Nov 27, 2011
473
Joined
Nov 27, 2011
Messages
473
No.
W/L(PMOS)=4*W/L(NMOS)
Therefore if W/L(PMOS)=6/1, then W/L(NMOS)=6/1 *1/4= 6/4/3/2

The PMOS needs to be wider than the NMOS for the same conductivity and channel length.
ok thank you very much

some specification for cmos nor gate
.*dc supply voltage
* dc input voltage
*dc output voltage
*dc input current
*dc output current
* power dissipation

ok If we have two known value then we can determine another value
example If we know voltage and resistance then we can determine current by ohms law

can you give me some homework ?
can you give me some numeric value to determine unknown value like I mention in above spcification actually I want to learn by doing some real work, that circuit is mine i want to play with this circuit I will do some home work so please guide me
 

Harald Kapp

Moderator
Moderator
Nov 17, 2011
13,728
Joined
Nov 17, 2011
Messages
13,728
Sorry, I've been out of the IC design business for years. Luckily so far your questions were rather basic and I was able to answer them off the cuff. I do not have any material at hand that might be suitable for homework or for more detailed design of your circuit (besides, you'd neeed the parameters of the underlying manufacturing technology).
I'm pretty sure that if you search the internet, you will find suitable assignments. It seems that especially US American universities often make their material public.
 

vead

Nov 27, 2011
473
Joined
Nov 27, 2011
Messages
473
ok thanks lot I have question
I made that circuit on proteus software
can I use proteus to simulate that circuit ?
 

Harald Kapp

Moderator
Moderator
Nov 17, 2011
13,728
Joined
Nov 17, 2011
Messages
13,728
I don't know, because I don't know proteus. If you have suitable models for the transistors it may work. Just try it.
 
Top