# noise problem in voltage booster circuit

Discussion in 'Electronic Design' started by jsmith, Apr 8, 2007.

1. ### jsmithGuest

hi all

vbstr.png} show the following noise levels:
A: <+-50mv
B:~ +-200mv at 67v output
D: <+-10mv

How can I reduce noise level at point B to about +-50mv?

2. ### jsmithGuest

excuse me noise level at point D is about Zero;

3. ### JamieGuest

Well, you're going to get noise there because transistors in
general make noise at certain regions. Thermoshot noise comes
to mind also!, you're using a 741 which isn't the cleanest Op-amp
there is.
use a small capacitor to ground on the Base at C and Collect at
B,. also, a small choke in series with the collector then cap to
common helps.
some where in the hood of .1uf should do it.

4. ### Guest

jsmith,

First of all, what is "vin"? DC? AC? Signal? What frequencies?

Also, what type is Q2? And what value/type is L3? And C54 and C55?

Some possible suggestions:

This appears to be an oscillator. I didn't have a 741 model to
simulate it with. But, with 2V DC for vin, and an OP275 (and 500K for
the 1M pot), it oscillated at about 180 kHz, after about 70 ms. And
with an LT1007, it oscillated at about 55 kHz, after about 49 ms.

And if the bottom of the 1M pot is connected to the opamp's negative
input, instead of to the positive input, it appears to just add 75 to
90V DC to the input signal (depending on the 1M pot's value), while
attenuating an AC vin input signal by about 80%.

But, _assuming_ that you just drew the circuit's schematic
incorrectly, for this post only:

Can you use a better opamp?

Can you lower the resistances' values?

Depending on what vin is and what it's for, you could try a capacitor
from point B to GND.

- Tom Gootee

http://www.fullnet.com/~tomg/index.html

-

5. ### jsmithGuest

Thanks Jamie
I before replaced 741 with OP07 but the result is the same.
Also before there was a RC(1K,2n2) between collector and base that
force circuit to oscilate, other values for C (20p to 100n) didnt
produce good results.
I will try with choke.

6. ### jsmithGuest

Thanks Tom

Vin is DC
Q2 is KSP42
L3 680 uH plastic axial
C54,55 are 1uF multilyer
U10 is OP07

because of low output impedance of +100V supply source, I have to use
this resistances values, but if you think change of resistors, produce
considerable change in noise, I will replace +100V supply.
I will try with change configuration of inputs of opamp and polarity
of DC Vin.
The cap between B and GND make circuit oscillate with this
configuration.

7. ### John PopelishGuest

You might try adding a 1 nF cap (1000pF) between the opamp -
input and its output, to roll the response off at about 1
kHz. This eliminates most of the frequency response that
might contribute to oscillation.

8. ### jsmithGuest

Because of high voltage at B point I cant control PNP transistor with
opamps with +-15V power supply, so the bottom of the 1M pot is
connected to the opamp's posetive input istead of negative input with
PNP transistor control

9. ### JamieGuest

I ment between the Collector to Grd and another from base to grd.

10. ### jsmithGuest

Thanks John
I will try it.

11. ### jsmithGuest

Dear Jamie
if you ment, use both of them together, i will try it

12. ### John PopelishGuest

I took a better look at your circuit, and it would be a lot
better if you could use a lower impedance drive to the
transistor than 330k and lower the voltage gain of the
transistor stage with emitter degeneration.

For instance, if you added a 15k emitter resistor to the -15
volt supply, eliminate the base diode and 330k base resistor
and replace them with a 12k resistor opamp output to base
and 10k from base to -15 V supply, the stability and noise
of the high voltage stage improves dramatically. This
biasing allows the output to follow an input all the way
down to zero volts. And you don't need any of that output
filter stuff.

I would still use a high frequency roll off capacitor opamp
output to - input, but it could be reduced to something like
22 to 47 pF to extend the closed loop response out to
almost 10 kHz.

13. ### jsmithGuest

Thanks John
I will try it.

14. ### John PopelishGuest

What is the ripple voltage, now at the 100V supply, and what
filter capacitance does it now have across it?

15. ### jsmithGuest

Thanks
only 1nf feedback cap was good and decreased noise to 50mv.
FFT of noise shows 100Hz peak noise harmonies. how can i calculate
L(or LC) filter for decrease this noise (from +100v power supply)?

16. ### jsmithGuest

It is only the above +-50mv noise.
parallel 220uF, 100nF, 10nF after bridge diode + LRC [680uH,

17. ### John PopelishGuest

In that case, you need more loop gain to reduce the ripple
with feedback. But your original circuit is not stable
unless you reduce the loop gain with the capacitor I
mentioned. However, the later version I recommended does
have about 10 times more loop gain at 100 Hz and will reduce
the ripple at the output about 10 times better.
Here is a repost of what I recommend, with one improvement,
a capacitor in parallel with the base drive resistor, to
improve the phase margin:

If you added a 15k emitter resistor to the -15 volt supply,
eliminate the base diode and 330k base resistor and replace
them with a 12k resistor opamp output to base, paralleled
with 100 pf and 10k from base to -15 V supply, the stability
and noise of the high voltage stage improves dramatically.

I would still use a high frequency roll off capacitor opamp
output to - input, but it could be reduced to something like
47 pF to extend the closed loop response out to almost 10
kHz.

18. ### MooseFETGuest

You can also place a resistor in series with that capacitor to add a
zero to the system. This lets you push the gain crossover higher than
you otherwise can because it takes out some of the phase shift at
higher frequencies. Normally, you would place the zero almost at the
gain crossover frequency.

19. ### Guest

I would have to have the transistor type to figure out if that
resistor would be helpful for not. As it is, it is cancelling the
base capacitance, approximately, including the Miller capacitance.

20. ### MooseFETGuest

Since I didn't specify the value, I maintain that it can be optimized
for any transistor that may be there. If you had some mythical
transistor with no capacitance, a quite large value would be used.
For any real transistor, you can move the zero to line it up with a
pole. I can't think of a case where zero would be the best value.