Discussion in 'Electronic Design' started by Myauk, Sep 13, 2012.

1. ### MyaukGuest

Hi All,

As I am working on Slope ADC configuration as described by AN863
, page 3 figure 5 shows Ramp Rate Method where by using a single
Capacitor and a known ref: resistor, the resistance of any unknown
resistor Rx can be measured. The method goes as follows:

1. Connect the supply voltage through the ref: resistor Rref and let
the capacitor chraged until it reaches threshold voltage Vth, the
charge time T1 is recorded.
2. Discharge the capacitor and then connect the supply voltage again
through unknown resistor Rx, and let the capacitor charged until it
reaches threshould voltage Vth, charge time T2 is then recorded.

And theoractically, Rx = (T2/T1) * Rref

I used C = 0.47 uF, Rref = 200 ohms, Vth = 2.02V, Vsupply = 3.08V (I
use PIC18F45k20 port RA1 and RA2 to supply voltage to RC ckt, and RA0
as the comparator input).

Results are not as expected.

When Rref = 200 ohms with C=0.47 uF , time T1 is measured to be 138 us
to reach 2.02V. Again, when Rx = 360,540 ohms, with the same capacitor
0.47uF, time T2 is measured to be 200,292 us. The time Ratios T2/T1
does not match the time ratio in this experiment.

I understand that the source characteristics of the I/O port in the
MCU affects the charge time behaviour but I am not sure how exactly it
relates and I do not know how to model the circuit so as for me to
calculate predictable results.

Any suggestions?

Regards

2. ### George HeroldGuest

What's the source impedance driving the RC? (most likely pretty low..
but.)
What's the input impedance of the comparator input?

George H.

3. ### MyaukGuest

What's the source impedance driving the RC?  (most likely pretty low..
Hi George,

May I know if there is any way to find out? The Microchip does not
give me such details.

Regards

4. ### MyaukGuest

What are you using for a switch?  Electronic switches have non-zero
Hello Tim,

I have got a reply from the original author of the application notes.
He said the microchip I/O ports have about 50-100 ohms of resistance.
Additionally, they have a slew rate limit that prevents them from
activating too fast.

For the case of capacitor I am using NPO Capacitors
http://sg.element14.com/jsp/search/productdetail.jsp?SKU=1679460.

For Modelling such circuits, what are the critical parasitic
parameters for my case? ESL? ESR? Just for clarification, they are the
lumped parameters calculated by the supplier for modelling the
capacitors, right? I mean once I use ESL or ESR I don't need to use
parallel parasitic resistance and inductance parameters any more, I
guess..

Regards
Aung

5. ### hamiltonGuest

Operating Temperature -55°C ~ 200°C !!!!!!!!!!!!!!!!!!!

6. ### JamieGuest

I was with Semco when they started manufacturing surface mount, fully
encapsulated mica capacitors. At that time, our only customers for those
were military.

At that time, the Japanese were making these caps mostly by hand and
the yield was averaging 50%, yes, I said 50%.. Not good..

Others out there were also making them, but with low yields, too.

I joined them just as they were entering this product line and soon
determine that is was a very difficult product to manufacture. so the
company invested in some hardware. Robotic X,Y,Z with video eyes and
some automation between each step, advanced the process greatly.

By using basic video cams mounted on the arms and corners of the
station, the computer program was able to fully comprehend picking
through a pile of mica chips with a vacuum finger and wand to sort and
pick up each piece. it then was be placed in a contact frame (very small
one) where a HI-POT test took place. Then this sample would be
transferred over to the next step and inserted into a stacking jig..

etc. the nice part about all of this was, the software was intelligent
enough to self correct all the wall to the encapsulation and UV process.

With the use of camera's and software smart enough to know what it's
looking for, it made the mechanical end of this process much more
reliable because the software could self correct position due to
mechanical error or placement error..

All the software was done using Delphi, vender supplied drivers for
the cameras, remote Io etc.

It was a huge success and when the share holders saw this, they seized
the opportunity to sell the business while they had something to offer
and took the money and ran. Ofcourse, it got sold to a India company.

Oh btw, I wrote the main software and did lots of the specialized
automation custom circuits to be joined with commonly available
automation components.

Jamie

7. ### MyaukGuest

If you have the room on the board, use some small switching FETS (or
Thanks for the suggestion, Tim,

I am trying the swtich action of PMOS circuit which looks something
like this

The PMOS alone can't prevent the charging condition to the capacitor,
even at turn-off condition, it has some resistance value, and the
capacitor gets charged regardless of VGS. I mean when VGS < VGS(th),
the PMOS switch turns off the circuit alright, but the leakage current
still flows through the source to drain of the PMOS, as a result the
capacitor is still charged. To make the switch action complete, I
think I have to use a complementary pair like this

Any suggestion?

Regards
Aung

8. ### JamieGuest

I don't know, Jacob Barnett seems to think SH maybe incorrect in his
assumptions..

Jamie

9. ### John SGuest

Change Rref to 10k and get back to us.