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Need help in designing RF CMOS analog subtractor

Hi all,
I have to design a cmos analog RF subtractor. Conditions it should
be meet subtractor
1. ultra low power
2. No DC component in output
3. Large signals at input terminals
4. Gain must be unity.

I am waiting for assistance.
 
R

Rene Tschaggelar

Jan 1, 1970
0
Hi all,
I have to design a cmos analog RF subtractor. Conditions it should
be meet subtractor
1. ultra low power
2. No DC component in output
3. Large signals at input terminals
4. Gain must be unity.

I am waiting for assistance.

Sure.
What about frequency range ? Amplitude range ?

Rene
 
J

joseph2k

Jan 1, 1970
0
Hi all,
I have to design a cmos analog RF subtractor. Conditions it should
be meet subtractor
1. ultra low power
2. No DC component in output
3. Large signals at input terminals
4. Gain must be unity.

I am waiting for assistance.

Why do you expect your betters to do your school assignments for you?
Do not bother again us until you have done most of the work yourself.
 
A

Ancient_Hacker

Jan 1, 1970
0
Hi all,
I have to design a cmos analog RF subtractor. Conditions it should
be meet subtractor
1. ultra low power
2. No DC component in output
3. Large signals at input terminals
4. Gain must be unity.

I am waiting for assistance.


(1) How low power? My brother works with long-distance power lines,
where "low-power" means under a megawatt.

(2) How close to "No"? Anything under 100mV is easy to do. Anything
under 5mV is tricky. Please specify.

(3) How large is "Large"? A microvolt is large to a satellite dish
LNA. A thousand volts is small to a HiPot tester. Please specify.

(4) How close to unity, and over what frequency range? There are
amplifiers for seismic studies that roll off at 10Hz, then there are
scope front end amplifiers that roll off at 10GHz. Please specify.
 
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