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need help from GC-eDRAMs experts (pretty urgent)

Discussion in 'General Electronics Discussion' started by vlsi_lady, Oct 4, 2016.

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  1. vlsi_lady


    Sep 27, 2016
    Hi :)

    1. how should i bias:

    3T GC-eDRAM (only NMOS devices)
    2T GC-eDRAM (write is NMOS, read is PMOS)

    in order to measure the static power consumption?

    2. if i boost a signal which is connected to an NMOS' gate (in order the pass a strong value through that device), but the boosted signal is also connected to the souce/drain of another two PMOSes (their gates aren't connected to the boosted signal)- how should i bias the PMOSes' bulks? should i connect them to the "regular VDD"? should i connect them to the boosted voltage?

  2. davenn

    davenn Moderator

    Sep 5, 2009
    have you got datasheets for these chips ?
    I suggest you obtain them, they will give all the info
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