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Need explantion of part of schematic

L

Lessie

Jan 1, 1970
0
The schematic concerned is at the end of the microchip
document on microchip serial programming
http://ww1.microchip.com/downloads/en/AppNotes/91013b.pdf

The circuit generates VPP for the programming phase. D1 is
the reference of 12.7V and Q2 forms a negative feedback
with the opamp. This part I do understand. However, Q2 is
strange, what does it do? It seems that it will be in a
cut out state because base will be higher than emitter by
0.6V due to Q2 ?
 
B

Ban

Jan 1, 1970
0
Lessie said:
The schematic concerned is at the end of the microchip
document on microchip serial programming
http://ww1.microchip.com/downloads/en/AppNotes/91013b.pdf

The circuit generates VPP for the programming phase. D1 is
the reference of 12.7V and Q2 forms a negative feedback
with the opamp. This part I do understand. However, Q2 is
strange, what does it do? It seems that it will be in a
cut out state because base will be higher than emitter by
0.6V due to Q2 ?

Q1 is there to discharge the 12.7V line capacitance when Vpp_in goes low. In
programming operation it is isolated as you have rightly understood. But
when Vpp_out stays high, when the next instruction is send, it will be
misinterpreted as a programming bit, so the line has to be forced low within
one clock cycle and Q1 guarantees that.
 
B

Bob Monsen

Jan 1, 1970
0
The schematic concerned is at the end of the microchip
document on microchip serial programming
http://ww1.microchip.com/downloads/en/AppNotes/91013b.pdf

The circuit generates VPP for the programming phase. D1 is
the reference of 12.7V and Q2 forms a negative feedback
with the opamp. This part I do understand. However, Q2 is
strange, what does it do? It seems that it will be in a
cut out state because base will be higher than emitter by
0.6V due to Q2 ?

It's a bizzare way to draw the circuit. However, if you notice, the
emitters are both connected to the same node, which is also the feedback.
Thus, it's just a follower. Why they feel they need low
impedance for Vpp is beyond me, though. Usually, Vpp draws almost no
current, so the opamp by itself should work fine. Whatever.
 
L

Lord Garth

Jan 1, 1970
0
Lessie said:
The schematic concerned is at the end of the microchip
document on microchip serial programming
http://ww1.microchip.com/downloads/en/AppNotes/91013b.pdf

The circuit generates VPP for the programming phase. D1 is
the reference of 12.7V and Q2 forms a negative feedback
with the opamp. This part I do understand. However, Q2 is
strange, what does it do? It seems that it will be in a
cut out state because base will be higher than emitter by
0.6V due to Q2 ?

Q1 & Q2 rapidly, cleanly and alternately switch Vpp between Vcc and Gnd.
Q2 is an NPN transistor. When its base is (very) positive WRT its emitter,
Vcc
on the collector less the (insignificant) drop across the transistor,
appears
at the R13-emitter junction and 1mA flows through R13.
Q1 now has 5 volts on its emitter and gnd at its collector. When U1A
switches to low, the PNP transistor Q1 turns on and Q2 turns off which pulls
Vpp to gnd.
 
B

Byron A Jeff

Jan 1, 1970
0
[Mucho Snippage]
Why they feel they need low
impedance for Vpp is beyond me, though. Usually, Vpp draws almost no
current, so the opamp by itself should work fine. Whatever.

Actually this is a driver for the 16CXXXX EPROM based parts. If you check
their programming specifications sheet (and I have recently on another
matter) you will find that the max current draw for Vpp is up to 50mA.

Hence the need for a low impeadance path.

My Trivial High Voltage Programmer follows your suggestion as I have
specifically targeted it for Flash parts. However it would need a much
lower impeadance path to work with EPROM based parts.

BAJ
 
B

Bob Eldred

Jan 1, 1970
0
Lessie said:
The schematic concerned is at the end of the microchip
document on microchip serial programming
http://ww1.microchip.com/downloads/en/AppNotes/91013b.pdf

The circuit generates VPP for the programming phase. D1 is
the reference of 12.7V and Q2 forms a negative feedback
with the opamp. This part I do understand. However, Q2 is
strange, what does it do? It seems that it will be in a
cut out state because base will be higher than emitter by
0.6V due to Q2 ?

These transistors form a complimentary-symmetry emitter follower output
stage for the op-amp. The purpose is to increase the current capability of
the amplifier output. It can both source and sink current, the NPN pulling
high and the PNP pulling low. This is a linear, analog amplifier circuit.
The overall amplifier has unity gain and delivers the voltage of the zener
references. These voltages are controlled, on and off by the controller. The
circuit is drawn funny with the PNP on top making it harder to understand.
Normally this circuit is drawn with the NPN on top and the PNP on the bottom
and the two emitters connected together. Redraw it and it will become
obvious.
Bob
 
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