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Need a simple latch circuit using logic gates

Discussion in 'General Electronics Discussion' started by sjgallagher2, Feb 19, 2013.

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  1. sjgallagher2


    Jan 27, 2013
    In my current project, a 3 to 8 decoder that takes input from a PICAXE 08M2, splits it into 2 sets of 4 outputs (from the 8) and powers a 4x4 array of LEDs. I came across a problem, the 3 to 8 decoder (I built from inverters and 2 input AND gates) can only output one thing at a time, so because I have 4 total outputs from my picaxe 08M2 I can use it with my passive matrix like so:
    output column controller 'pin' (1-4)
    put into latching circuit with 'timer' ouput from picaxe
    stop outputting column controller pin
    latch stays on as long as latch circuit gets 1 of 2 inputs
    ouput row controller pin (5-8)
    hold for as long as needed
    (the timer tells the circuit how long to hold the column controller pin)

    Does that make sense?
    I'll supply a schematic if it's critical but these previous parts of the circuit aren't important to me, the important thing is the latching part.
    Think of it like I get 2 inputs, and I want to hold them as long as one of the two is on. Then output that to an LED.

    My idea is to use an AND gate, and feed the output back into the input via a diode so that it will stay on. Here's a schem:
    Here's a link instead

    The problem with this circuit is with S1 I think, because if I use a switch and try the circuit, if it's on, it stays on as long is S2 is closed the whole time. That's just what I want.
    But, if I use an automated on-off system via a uController it doesn't work (except by accident once, and I can't replicate). A new idea comes to mind to use an OR gate and feed that into the place of S1, will that work? Does anyone know why the AND latch doesn't work if it's input is from an AND gate that gets it's input from a picaxe? PLEASE help! It's day 4 of this project and I'm exhausted, this is as close to the last step as I've ever been. Thanks.

    (the schematic)
  2. sjgallagher2


    Jan 27, 2013
    My most current idea is a normal NAND RS Latch with an AND gate that receives from Q and R which is the timer. If S is the input from the AND gate, then it could work! The sad part is I'll need four of them to finish this circuit which could get extremely annoying. I'll see what I can do I suppose.
  3. sjgallagher2


    Jan 27, 2013
    Okay that won't work.
  4. Harald Kapp

    Harald Kapp Moderator Moderator

    Nov 17, 2011
    The schematic doesn't show in the forum. Is it on a server with limited access?
    Why do you use single gates? There are complete latch and register circuits available (look for example here).

    Your multiplexing scheme per se seems o.k.
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