# "multi-level bits"

Discussion in 'Electronic Design' started by Jon, Nov 8, 2012.

1. ### JonGuest

I'm interested in increasing the transmission rate over Cat5 for a
personal project. (Cat5/5e/6 will be chosen because of it's properties
and obtainability but will not be used in the standard way)

In any case what I'm interested in using a "multi-level bits" per
clock of transmission. Digital communication almost always uses a
single bit per clock.

For example, using a single bit(0 or V) in cat5 at 100mHz allows only
for a 100Mbits data rate. Using 4 bits allows for and effective rate
of 400Mbits/TP(or over Cat6a, 2GB/TP). For my project this is
significant.

Obviously adding more bits per clock increases complexity and
decreases the noise immunity but I feel that it could be done with a
few logic gates and will work for my particular application.

Since the signals will be differential it seems it may be pretty easy
on the tx side by actually not having one of the lines being the
mirror images but independent. Noise immunity will still be retained
due to the differential nature.

Essentially on each end of the line we will have 4-bit DAC(for tx) and
ADC(for rx) to convert to and from the multi-level representation.

My question is, besides the added cost and complexity(which doesn't
seem to be all that great?), are there any other reasons why it is

I conclude that there seems to be no loss of noise immunity:

Asymmetric differential signaling is used. External noise will be
canceled out in exactly the same manner when symmetric different
signaling is used(assuming that the noise does not depend on the
voltage in the wire)

The noise margins can be kept the same by simply amplifying and
attenuating the signal before and after transmission. e.g., normally
0-3.3v are used. We can amplify this to 0-26.4V which will give the
same distance between each level(3.3V). Of course, the cost is 8 times
the transmission power but this would probably be similar to when
using a single-bit/clock rate that is 8 times larger.

Therefor, best I can decern, the real cost in achieving around an
order of magnitude in throughput is a few dollars in parts. (a
monolithic tx and rx ic would reduce the complexity to near 0).

Is there any real downside besides what I have listed. Basically what
are the practical drawbacks?

2. ### Robert BaerGuest

* Err..if the lines are not "mirror" image then they are NOT
"differential nature".

3. ### JonGuest

I'm sorry but that is simply not true. The noise immunity comes from
the fact that the noise is identical on both wires and when the two
signals from the wires are subtracted the noise is cancelled out. This
is regardless of what is input on both wires(before the noise takes
effect). Very simple 3rd grade arithmetic shows this to be true.
Symmetric differential signaling uses the mirrored signal only for
convenience and simple mindedness NOT because it is required.

4. ### linnixGuest

You means a few high voltage FPGAs? Switching 16V to 20V at 100MHz will not be easy. The distance will also be much shorter.

5. ### JonGuest

huh?

The voltage translation would occur right at the wire after(and before
on the rx end) anything else. It is simply used to increase the noise
immunity in the wiring... nothing else. (it may not even be needed but
is irrelevant to the problem of converting the single to and from a
multi-level bit representation)

6. ### linnixGuest

You will need high speed, high voltage drivers to drive the wire.

7. ### linnixGuest

100MHz voltage translators would not be easy to build. So, you have to do all the logics in high voltage.

8. ### JonGuest

I believe you are confused. You do not need to translate any voltages
and the logic can be done at standard voltages.

Only the line will see "high voltage" and it is only used to increase
interlevel noise immunity.

9. ### JonGuest

That's what I've learned. It is being done. If I could get at the
physical layer of 1000BaseT then it might work well. But basically I
want to serialize a stream of bits with minimum latency as fast as
possible without using packets and other such things. I'll have to
look more into the 1000BaseT and see if I can find a way to use it.

Thx.

10. ### JonGuest

Huh?

Antenas?

What the heck does that have to do with anything?

Let a(t) be the input signal for one line and b(t) be the input signal
for the other. Let n(t) be the common noise on both signals.

The "output" of the wire is A(t) and B(t)

then A(t) = a(t) + n(t) and B(t) = b(t) + n(t)

A(t) - B(t) = a(t) - b(t)

I.e. The noise is removed. (note, we could even have b(t) = 0 ==>
single ended instead of differential but we have less noise immunity
than if we set b(t) = -a(t))

This is regardless what a(t) and b(t) are. We can only recover the
difference though. (in some sense, a(t) or b(t) but not both)

The issue is not so much as to use asymmetric differential signaling
to decrease line noise symmetric differential signaling has better
noise immunity due to cross talk between the twisted pair and a larger
margin for line noise(2 times the amplitude). The main thing is that
we can use the differences to help us map the voltages from 2 bits
down to one

00 -> 0
10 -> 1
01 -> -1
11 -> 2

So here we will have 4 voltages levels per clock, the differential
output at the rx side will receive 0,1,-1,2 which it will then map
back to the 2 bit groups. This makes it way easier on the tx side at
the cost of noise immunity(which will also change depending on the
bits).

In this case each copper conductor only carries a voltage of 0 or 1.
For more bits we must change that.

00 -> 0
10 -> 1
40 -> 4
01 -> -1
11 -> 2
41 -> 3
04 -> -4
14 -> -3
44 -> 8

In this case each conductor caries 6 possible voltages (0, 1, 2, 3, 4,
8) but all are unique. In this case it is a 3-bit system but requires
another step of translation. There might be optimal mappings.

11. ### whit3rdGuest

It has to do with your receiver for asymmetric signals responding to
both the differential (subtraction) signal AND the common-mode (sum) signal..
If you're using only the difference, receiving (like Ethernet baseT receivers)
with a transformer coupling, you needn't drive nor filter against
common-mode signals. But, if your signals are encoded into the
common-mode, you CANNOT ignore them, you MUST drive that
common-mode signal, and that makes your transmission line a potential

12. ### JonGuest

Further the better. At least 50m. CatX generally has 100m specs so it
should be rather easy to achieve the data rates of these specs:
100Mbit rate/TP. I'm interested in increasing this if possible.
1000BaseT uses PAM-5 which but for some odd reason has the same data
rates as non-PAM.

I can see how reflections could interfer with the multiple levels,
which is why I suggested that pre-amplifying the signals might be
required. This will offer the same interlevel voltage margins but, of
course, might cause other problems.

Since it seems ethernet has already tackled the problem I'll have to
do more research in that area. The main issue I have to contend with
is having to use the physical layer. It's the only way to achieve the
rates I'm after if I decide to use Ethernet...

13. ### JonGuest

But the common mode does not have any noise immunity?!?!?! So it would
be useless to use TWP or differential signaling to do so?

What would be the real benefit of using the common mode of a
differential TP over a single conductor? (by real benefit I do not
mean increased cost, complexity, and marking hype)

14. ### Tauno VoipioGuest

For the coding and decoding, you should get and read a textbook on
are well known.

The speeds you specify mean that the cable has to be regarded as a
transmission line. The signal travels principally in the isolation
between the wires, and an asymmetric feed will convert your cable
to an antenna spewing interference into the surrounding space and
picking unwanted signals (interference and noise) to spoil your
transfer. There is a good reason why there are symmetric transformers
and balun coils in Ethernet interfaces.

Please note that the impedance of a twisted pair is around 100 ohms,
so already 10 volts means significant power. The Ethernet standards
are running at signal levels of the order of a volt. The attenuation
of the cable chenges with frequency, and this has to be compensated,
if you wish to be able to decode the received signal.

15. ### JonGuest

Ok, I looked up the term even and odd signals and I can see how it
will be an issue. With multiple values the even and odd mode's are
switch. In any case it shouldn't be a huge deal. First, Ethernet
1000BaseT already does this kind of switching and so the issues must
have been worked out.

Second, one can still use symmetric differential signaling ==> odd
mode by simply using a larger number of voltage levels.

for 3 bits:

000 -> (1, -1)
001 -> (2, -2)
010 -> (3, -3)
011 -> (4, -4)
100 -> (5, -5)
101 -> (6, -6)
110 -> (7, -7)
111 -> (8, -8)

(x,-y) means that an x level is sent on one conductor and y on the
other(using some scale). This requires a larger number of voltage
levels though which then introduces other problems which may or may
not be more serious than what you have stated.

16. ### Bill SlomanGuest

You probably want to read up on phase/amplitude signalling. It was
invented for telephone modems, but should generalise.

Essentially, your multi-level signal encodes data in terms of both
phase and amplitude. You apply both in-phase and quadrature components
to the driven end of the cable, and retrieve them from the receiving
end.

17. ### EcnerwalGuest

Evidently 5-level signaling is standard on 1000-Base-T. Being at the "I
use it, not build the hardware" end of that, news to me since I never
really cared how it worked so long as it worked. Might mean you can
repurpose GbE drivers for your work, or just use GbE to do your work, if
a gigabit will do you. Any new Cat5 you can find today is probably
Cat5e, though if you really want Cat5 I can part with some, slightly
used.

However, I'd suggest a long hard look at optical fiber (bend insensitive
unless you care to be fiddly with it) for anything you are building from
scratch where high-speed data transmission is a big deal. Depending on
exactly how special your setup is, you might be able to design around
existing plug-in module parts (either dirt cheap used and 1-4Gb/s or
more expensive and faster) to keep from having to do any fiddly optical
work.

4Gb/sec fiber channel SFPs were down to \$3.49 shipped last time I
checked on sleazebay. Naturally you can pay more, but I've been using 30
or so of those clean IBM takeout SFPs for a couple of years (running
GbE) now without a hitch. Faster ones can be had by applying more money.

Sleazebay or FIS, et al, can supply you with pre-terminated optical
cable assemblies, so obtainability is not difficult at all.

18. ### Guest

DVB-C cable-TV use up to 256 levels (8 bit/symbol) up to several
hundred MHz bandwidths.
With non-ideal cables you sooner or later have move to some DMT/COFDM
style multicarrier systems as used in ADSL2+ or DVB-C2 both with up to
12 bits/symbol and DVB-C2 up to 800 MHz frequencies in coaxial cables
(i.e. about 10 Gbit/s in a cable).

Of course using optical fibers (possibly with WDM) would give a very
high throughput.

19. ### John WallikerGuest

I'm sure you will find that optical fibre is much easier to use than
you imagine. Multi-mode (850nm) SFP transceivers are indeed very
cheap on eBay. So are ready made duplex patch cables up to 30m or
sometimes 50m long with LC connectors. It is easy to join several
patch cables in series with cheap adapters.

Although the interface looks a bit complicated with i2c as well as
differential data connections, you can completely ignore the i2c pins
and everything will "just work". There are various types of SFP
transceiver around, including Gbit Ethernet and various speeds of
Fibre Channel. These are fundamentally the same, they just have
different maximum signalling speeds. Some have a bandwidth control
pin which adjusts the low-pass filter in the receiver to suit the data
rate. Any SFP will give a low-pass corner at 1.5GHz or higher,
regardless of the setting (so long as you avoid the old and rare
100Mbit ones).

These devices are completely protocol agnostic, so long as the data is
coded with an equal number of high and low bits to prevent the
detector dc working point from drifting around. Data rates below
1GBit/s should work fine, but avoid going too low in frequency in case
the laser objects to driving at full power for too long. The internal
dc blocking capacitors are normally 10nF in each 50 Ohm line of the
differential pair. The laser is amplitude modulated between "just on"
and "full brightness". Nearly all receivers include a comparator, so
don't try driving multiple levels to get even more bandwidth!

Any variant is likely to work fine from a few hundred Mbit/s to just
over 1Gb/s. Don't worry about matching brands at each end - the only
significant difference is the manufacturer name stored in the i2c
eeprom.

Avoid single mode devices (usually 1310nm) and cable unless you want
to spend a bit more or need a range greater than a few hundred metres.

John

20. ### George HeroldGuest

Just lurking... I'm not sure what you mean by even and odd modes.
Can I just think of a vibrating string?
even modes have a node on each end, odd modes have an anti-node at one
end?

Or something completely different?
George H.