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Mosfet Spice Subcircuit

Discussion in 'Electronic Design' started by ROBIN MARSTRAND, Jul 30, 2003.

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  1. Hello Anyone who works with PSpice.

    I am having difficulties interpreting some circuits, drawing them in OrCAD
    Capture, then simulating them in PSpice.
    The circuits do not oscillate.
    They contain ZETEX Mosfets and NO resistors. In the circuits special
    configurations allow the Mosfets to serve as capacitors and resistors. And,
    even when using R's to control current sources and sweeping the input with a
    slow sine wave over a 4V range, I get no sign of them leaping into
    operation - Schmitt triggers won't work either:-


    and they are modelled thus:-

    *ZETEX ZVN0124A Mosfet Spice Subcircuit Last revision 6/91
    ..SUBCKT ZVN0124A/ZTX 3 4 5
    * D G S
    M1 3 2 5 5 MN0124
    RG 4 2 225
    RL 3 5 2.4E7
    D1 5 3 DN0124
    ..MODEL MN0124 NMOS VTO=1.5512 RS=1.436 RD=9.254 IS=1E-15 KP=1.077
    +CGSO=60E-12 CGDO=2E-12 CBD=36E-12 PB=1 LAMBDA=0
    ..MODEL DN0124 D IS=3.071E-12 N=1.026 RS=0.511

    *ZETEX ZVP2106A Mosfet Spice Subcircuit Last revision 3/86
    ..SUBCKT ZVP2106A/ZTX 3 4 5
    * D G S
    M1 3 2 5 5 MP2106
    RG 4 2 160
    RL 3 5 1.2E8
    D1 3 5 DP2106
    ..MODEL MP2106 PMOS VTO=-3.193 RS=2.041 RD=0.697 IS=1E-15 KP=0.277
    +CGSO=47E-12 CGDO=10E-12 CBD=105E-12 PB=1 LAMBDA=1.2E-2
    ..MODEL DP2106 D IS=2E-13 RS=0.309

    Could these be level 1 configurations?
    Would level 4 be better?
    Can anyone supply better models OR MOSFETS for the job?

    In his...

    "Simple, Wide Tuning Range Eith High PSSR" - by Kevin Aylward B.Sc. AnaSoft

    ....Kevin describes another VCO design as follows:-

    This is a standard 3 stage differential amplifier with PMOS loads, connected
    in an oscillating ring loop. A VCO control voltage controls the tail
    currents of each of the stages, which changes the delay/phase response of
    the loop and thereby the frequency. Supply rejection is achieved by the use
    of two source follower connected natural NMOS devices.

    The novelties of this design are the direct filtering of the supply by small
    nmos devices right at the VCO, and the control of the operating current with
    an NMOS device reference to ground.

    These small power supply filtering devices minimizes capacitive feedthough
    from the supply and the ground referenced control current also minimizes
    supply coupling.

    7. Operating Conditions

    Transistor sizes of the oscillator were set to their minimum valuses, i.e.
    W=0.22u, L=0.18u.

    Nominal supply voltage was 3.3 volts, but with the VCO transistors biased
    such that their voltage did not exceed 1.8V, which is the limit for these
    tmsc devices.

    At a V control of 0.5V, frequency was 1.9Ghz at 18ua supply current.

    8. Basic Results

    At a V control of 0.6V nominal supply current is 55ua at an oscillation
    frequency of 4.6Ghz.

    At a V control of 1.0V, frequency was 5.2Ghz at 65ua supply current.

    With ideal bias voltages, PSRR was better than 80db from DC to 10Ghz.

    The bias voltages for the PS filtering devices are crucial, and in practice
    derived from another special, high rejection ratio bias generator. Such a
    bias circuit is described in another paper by the author.

    Channel length was the main determinant of supply rejection at low
    frequencies, achieving 85db rejection with L=5u at DC. The 2 of 2pf
    capacitors ensure 100db rejections above100Mhz, "

    Where can I find models for appropriate MOSFET as shown in diagrams which I
    could attach to a private email? (It appears that Newsgroup message don't
    like carrying attachments).

    Hoping desperately and thanks, robinease
  2. {snip}

    Try using these generic bsim models.

    ..MODEL BSim3_3nmos_XN NMOS(Level=8 Tnom=27 Nch=249800T Tox=9n Xj=100n
    Lint=93.6n Wint=147n Vth0=450m
    + K1=756m K2=-38.3m K3=-2.612 Dvt0=2.812 Dvt1=462m Dvt2=-91.7m
    Nlx=35.2291n W0=1.163u
    + K3b=2.233 Vsat=86.3016K Ua=6.47n Ub=4.23e-003f Uc=-47.0628p Rdsw=650
    U0=388.32 wr=1
    + A0=349.697m Ags=100m B0=546m B1=1 Dwg=-6n Dwb=-3.56n Prwb=-213m
    + A1=27.7875m A2=900m Voff=-67.3553m NFactor=1.13993 Cit=162.253u
    Cdsc=-21.4718u Cdscb=0 Dvt0w=0
    + Dvt1w=0 Dvt2w=0 Cdscd=0 Prwg=0 Eta0=10.2817m Etab=-5.0422m
    Dsub=318.712m Pclm=1.11485
    + Pdiblc1=2.45357m Pdiblc2=6.40629m Drout=318.712m Pscbe1=5Meg Pscbe2=5n
    Pdiblcb=-234m Pvag=0 delta=10m
    + Wl=0 Ww=-1.42024n Wwl=0 Wln=0 Wwn=261.395m Ll=130.09p Lw=0 Lwl=0
    + Lln=316.394m Lwn=0 kt1=-300m kt2=-51m At=22.4K Ute=-1.48 Ua1=331p
    + Uc1=-342p Kt1l=0 Prt=764.3 L=10u W=400m hdif=200n)

    ..MODEL BSim3_3pmos_XN PMOS(Level=8 Tnom=27 Nch=353302T Tox=9n Xj=100n
    Lint=62.3n Wint=122n Vth0=-450m
    + K1=836.209m K2=-86.0662m K3=1.82 Dvt0=1.9038 Dvt1=533.392m
    Dvt2=-186.268m Nlx=12.8n W0=2.1u
    + K3b=-240m Prwg=-1m Prwb=-323m Vsat=103.503K Ua=1.39995n Ub=1.e-004f
    Uc=-27.3p Rdsw=460
    + U0=138.761 A0=471.655m Ags=120m Keta=-1.87152m A1=341.796m A2=830m
    Voff=-74.182m NFactor=1.54389
    + Cit=-1.01567m Cdsc=893.752u Cdscb=145u Cdscd=104u Dvt0w=232m
    Dvt1w=4.5Meg Dvt2w=-2.3m Eta0=60.2478m
    + Etab=-4.64593m Dsub=232.224m Pclm=989m Pdiblc1=20.7418m
    Pdiblc2=1.33813m Drout=322.24m Pscbe1=118K Pscbe2=1n
    + Pvag=0 kt1=-250m kt2=-32m prt=64.5 At=33K Ute=-1.5 Ua1=4.312n
    + Uc1=0 Kt1l=0 L=10u W=200m hdif=200n)

    Kevin Aylward
    SuperSpice, a very affordable Mixed-Mode
    Windows Simulator with Schematic Capture,
    Waveform Display, FFT's and Filter Design.
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