J
jure
- Jan 1, 1970
- 0
Well, my question no longer applies since I found the feedback arrangement
is very old, 1963, and well-known, even though it is often misspelled
You can apply feedback to the base of the input stage, which lowers the
input impedance and requires a known and fixed source impedance, or you can
apply it to the emitter, which raises the input impedance and requires a
resistor in the emtter. Plus a lot of other details.
But I don't understand the point of your comment. It is obvious, but what
does it have to do with the feedback configuration?
Regards,
Mike Monett
Mike,
If the input common source (CS) transistor sees an almost 0 ohm load
( the input Z of the transimpedance pair , if the loop gain is high
enough ) the time constant of that node will be very minimized.
Also, because this first stage has no voltage gain, Cgd1 is not
multiplied by Miller feedback when reflected into the input.
The CS input device has been unilateralized ... and its output behaves
close to an ideal current source.
Then, if ( BIG IF ) the second and third transistors could be modeled
as a TIA, with gain Rm, the total gain at midband frequencies is
(very) approximately equal to gm1.Rm .
The problem has now been transfered to the proper design of the
combination of M2 and M3.
Yet another twist would be to have M2 and M3 as cascode pair, instead
of a cascade CS - CS.
Here is my second attempt at ASCII art of the AC circuit.
|-----------|
|----VWV---|-----|| M3 |
| RL2 | |-->--| ///
/// | |
| |
|----| |
|----|| M2 |
| |-->-| |
| | |
| /// |
| |
| |
|----|-----------VWV---------|
IN ------|| M1 Rm
|-->---|
|
///
Thanks , Jure Z.