Mosfet Querry: Surviving Vgs overvoltage

[Roy McCammon]

Here is a link to an International Rectifier Ap note

http://www.irf.com/technical-info/an986/an-986p3.htm

near the bottom, in the paragraph that is observation #3
it is suggested that if you limit gate current to 100 uA,
it can survive over voltage.

So, what do you think. Can a mosfet survive excessive
Vgs with a big enough resister, or was it a fluke of
their experimental method.

By the way, this is a maddening apnote that refers to
figures and tables that are not present.

 

[Jim Thompson]

Here is a link to an International Rectifier Ap note

http://www.irf.com/technical-info/an986/an-986p3.htm

near the bottom, in the paragraph that is observation #3
it is suggested that if you limit gate current to 100 uA,
it can survive over voltage.

So, what do you think. Can a mosfet survive excessive
Vgs with a big enough resister, or was it a fluke of
their experimental method.

By the way, this is a maddening apnote that refers to
figures and tables that are not present.

My experience is that repetitiveness is the issue... cumulatively
there will be failure.

...Jim Thompson

 

[Walter Harley]

[...]

So, what do you think. Can a mosfet survive excessive
Vgs with a big enough resister, or was it a fluke of
their experimental method.

[...]

My experience is that repetitiveness is the issue... cumulatively
there will be failure.

That's interesting. I'm ignorant on the topic, but I had always thought
that the phenomenon was catastrophic destruction of the oxide layer; so, I
thought it was an all-or-nothing effect.

What are the physics that would cause a progressive behavior?

What parameters might be affected in a MOSFET that had been repetitively
stressed in this way but not yet actually broken? (Would gate leakage
increase?)

 

[Jim Thompson]

[...]

So, what do you think. Can a mosfet survive excessive
Vgs with a big enough resister, or was it a fluke of
their experimental method.

[...]

My experience is that repetitiveness is the issue... cumulatively
there will be failure.

That's interesting. I'm ignorant on the topic, but I had always thought
that the phenomenon was catastrophic destruction of the oxide layer; so, I
thought it was an all-or-nothing effect.

What are the physics that would cause a progressive behavior?

Metal ion migration.

What parameters might be affected in a MOSFET that had been repetitively
stressed in this way but not yet actually broken? (Would gate leakage
increase?)

No visible effect until the gate abruptly shorts.


...Jim Thompson

 

[Rene Tschaggelar]

Here is a link to an International Rectifier Ap note

http://www.irf.com/technical-info/an986/an-986p3.htm

near the bottom, in the paragraph that is observation #3
it is suggested that if you limit gate current to 100 uA,
it can survive over voltage.

So, what do you think. Can a mosfet survive excessive
Vgs with a big enough resister, or was it a fluke of
their experimental method.

I'd assume the specified max gate voltage is below
what they are sure that almost all pieces survive.
What is the point in driving them higher, anyway ?

Rene

 

[Roy McCammon]

I'd assume the specified max gate voltage is below
what they are sure that almost all pieces survive.
What is the point in driving them higher, anyway ?

Rene

I haven't read the whole appnote carefully, but I
believe it was an experiment to see it using a special
ESD test fixture gave anymore info that a curve
tracer and the answer was no. Seems the logic level
mosfets actually break down at about 48V and the others
at about 75V, so there is quite a bit of margin in the
typical 20V rating. Also says that at that time every
device was production tested at 30V for standard gates
and 15V for all logic gates.

The point is to survive if the equipment is misused.

 

[Spehro Pefhany]

I'd assume the specified max gate voltage is below
what they are sure that almost all pieces survive.
What is the point in driving them higher, anyway ?
Rene

You might be doing something strange with them, or it might not be
intentional (a bit of source inductance can do exciting things when
the MOSFET switches off fast).

Best regards,
Spehro Pefhany

 

[Rolavine]

[...]

So, what do you think. Can a mosfet survive excessive
Vgs with a big enough resister, or was it a fluke of
their experimental method.

Why do it, they are making great cheap ones that go up to 600 volts?

Rocky

 

[Winfield Hill]

Rolavine wrote...

Why do it, they are making great cheap ones that
go up to 600 volts?

Rocky, the subject was gate voltage, not drain voltage.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Roy McCammon]

Rolavine wrote...



Rocky, the subject was gate voltage, not drain voltage.

Thanks,
- Win

whill_at_picovolt-dot-com

so, if I put 1M in the gate drive, do think it will survive
an occasional accidental connection to 117V?

 

[Winfield Hill]

Roy McCammon wrote...

so, if I put 1M in the gate drive, do think it will survive
an occasional accidental connection to 117V?

ACCKK!! What's the deal, what do you have in mind with so
severely distorting the usual use of a power MOSFET? Here on
s.e.d. I've repeatedly emphasized the world reality of high
FET gate capacitances, and how this often implies non-trivial
gate-drive levels, contrary to the faulty notion that a FET's
gate looks like an open circuit, with an infinite impedance.

A more conventional approach is to protect the FET gate with
a 1/2 or 1-watt 12V zener diode, plus a series power resistor
to limit the diode's current. This approach is mindful of
the fact that typical power FETs have Ciss gate capacitance
much higher than the rather high capacitance of zener diodes.
For example, a 1n4742 12V 1W zener can handle 40mA under said
fault condition, or the rms current delivered from a 2.7-kohm
series resistor abused with 120Vac line voltage. If the 2.7k
resistor is rated at say 10 watts, it can continuously handle
the abuse you've asked about.

Furthermore, a 2.7k resistor is much more conducive to handling
a FET's say 1300pF of gate capacitance (time constant 3.5us),
than is a 1M gate resistor.

As usual, you need to tell us more about your thoughts and goals.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Rolavine]

Subject: Re: Mosfet Querry: Surviving Vgs overvoltage

From: Winfield Hill [email protected]
Date: 2/27/2004 6:18 PM Pacific Standard Time
Message-id: <[email protected]>

Roy McCammon wrote...

DOH!

Rocky

 

[Roy McCammon]

Roy McCammon wrote...



ACCKK!! What's the deal, what do you have in mind with so
severely distorting the usual use of a power MOSFET? Here on
s.e.d. I've repeatedly emphasized the world reality of high
FET gate capacitances, and how this often implies non-trivial
gate-drive levels, contrary to the faulty notion that a FET's
gate looks like an open circuit, with an infinite impedance.

heck, I don't care if it takes 10mS to turn on.

A more conventional approach is to protect the FET gate with
a 1/2 or 1-watt 12V zener diode, plus a series power resistor
to limit the diode's current.

I'm worried above leakage current through a zener from gate to
source; I don't want to commingle current from the gate drive
with that through the channel.

This approach is mindful of

the fact that typical power FETs have Ciss gate capacitance
much higher than the rather high capacitance of zener diodes.
For example, a 1n4742 12V 1W zener can handle 40mA under said
fault condition, or the rms current delivered from a 2.7-kohm
series resistor abused with 120Vac line voltage. If the 2.7k
resistor is rated at say 10 watts, it can continuously handle
the abuse you've asked about.

Furthermore, a 2.7k resistor is much more conducive to handling
a FET's say 1300pF of gate capacitance (time constant 3.5us),
than is a 1M gate resistor.

As usual, you need to tell us more about your thoughts and goals.

a highly survivable, low impedence, low leakage multuiplexor.

 

[Winfield Hill]

Roy McCammon wrote...

heck, I don't care if it takes 10mS to turn on.

Depending on what you're switching, and on the FET's voltage
rating, it may oscillate srongly at RF frequencies while it's
in the uncontrolled linear region.

I'm worried above leakage current through a zener from gate to
source; I don't want to commingle current from the gate drive
with that through the channel.

A needless worry for zener diodes well below avalanche.

a highly survivable, low impedence, low leakage multuiplexor.

There's a far better way to accomplish that task, which I've
outlined here on s.e.d. several times in the past. Using my
favorite part, the Supertex LND150 depletion-mode FET, one can
have his cake and eat it too. Enough hints, go check it out.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[Kevin McMurtrie]

heck, I don't care if it takes 10mS to turn on.



I'm worried above leakage current through a zener from gate to
source; I don't want to commingle current from the gate drive
with that through the channel.

Not even a 100M gate resistor will protect against 117V.

There's another problem here. It's not a good idea to drive the gate at
high impedances unless you can guarantee that the drain voltage will
never make any sudden changes. I've had too many personal projects
self-destruct because the gate voltage sometimes shot negative with
enough current to destroy the driver circuits and the MOSFET all at
once. It's the type of failure that's nearly impossible to debug.

You should follow Win's advice and use a zener diode. It protects the
MOSFET from overvoltage and it protects your driver from negative
voltage. Depending on what's connected to the MOSFET, you might have to
protect against unwated voltage rises in the gate too.

 

[Fred Bartoli]

heck, I don't care if it takes 10mS to turn on.


I'm worried above leakage current through a zener from gate to
source; I don't want to commingle current from the gate drive
with that through the channel.


a highly survivable, low impedence, low leakage multuiplexor.

Roy, have a look at this
http://www.irf.com/technical-info/appnotes/an-1017.pdf


Thanks,
Fred.

 

[Roy McCammon]

There's a far better way to accomplish that task, which I've
outlined here on s.e.d. several times in the past. Using my
favorite part, the Supertex LND150 depletion-mode FET, one can
have his cake and eat it too. Enough hints, go check it out.

thanks Win,

I had considered depletion mode mosfets, but my favorite
manufactures had discontinued them and I had given up finding any.

 

[Roy McCammon]

There's a far better way to accomplish that task, which I've
outlined here on s.e.d. several times in the past. Using my
favorite part, the Supertex LND150 depletion-mode FET, one can
have his cake and eat it too. Enough hints, go check it out.

DN3535 is more like the impedance I want, but the sucker
leaks a whopping 1mA at 125C. That's easily measured; can't
believe its just a convenient spec because of the measurement
problem.

 

[Roy McCammon]

Roy, have a look at this
http://www.irf.com/technical-info/appnotes/an-1017.pdf

thanks for the reference to the app note. I am considering
something like that. Actually these NAIS Photomos relays
look attractive.

http://www.naisrelay.com/p_mos/index.htm

 

[Roy McCammon]

A needless worry for zener diodes well below avalanche.

thanks,

got any numbers?