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MOSFET pull down in linear region

Discussion in 'General Electronics Discussion' started by matt111111, Jan 17, 2018.

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  1. matt111111


    Nov 26, 2014
    I have a current sense IC powered directly from a battery. I want the current sense IC to be in the shutdown state when the 3.3V power supply is disabled.

    I have added a dual N channel MOSFET circuit (see attachments) to achieve a pull down on the shut down pin (active low and internally pulled high) when the

    3.3V supply is not present. The circuit seems to work in LTspice but I am concerned about one of the MOSFETS operating in the linear region. (VDS < VGS - VT)

    Is it safe to operate the MOSFET in this configuration or is there anything I'm missing that is considered bad design?

    Attached Files:

    • 1.png
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    • 2.png
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  2. Alec_t


    Jul 7, 2015
    Vgs = 30V would kill most fets!
    Unless the 3.3V drops extremely slowly the linear state would be brief. With such high resistor values there will be only miniscule power dissipated in either fet.
  3. Harald Kapp

    Harald Kapp Moderator Moderator

    Nov 17, 2011
    With R2 = 1 MΩ a suitable zener diode from the gate of M1 to gnd will provide protection.
    Tha fios agaibh likes this.
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