A
[email protected]
- Jan 1, 1970
- 0
Hello:
I am designing a boost converter, and I am uncertain whether I need to
take specific measures (and which) to protect the main switch MOSFET
from the drain-source voltage breakdown. The fet is incorporated in
the switcher IC, and has the maximum voltage rating of 60V. I want the
converter's output voltage about 55V. Now, if one takes into account
the parasitic inductance of the PCB tracks and of the switcher's
package wires, one would conclude that high-voltage (albeit very
short) spikes, well above 60V, would be produced across the fet's
drain-source at switch-off. Even if I could somehow clamp the D-S
voltage at the switcher's connection to the PCB board, there would
still be considerable spikes due to the package's own wires (it is a
TO220-5).
Can someone help and tell whether I should bother about these spikes,
and if yes - to which extent? Many thanks!
-- A
I am designing a boost converter, and I am uncertain whether I need to
take specific measures (and which) to protect the main switch MOSFET
from the drain-source voltage breakdown. The fet is incorporated in
the switcher IC, and has the maximum voltage rating of 60V. I want the
converter's output voltage about 55V. Now, if one takes into account
the parasitic inductance of the PCB tracks and of the switcher's
package wires, one would conclude that high-voltage (albeit very
short) spikes, well above 60V, would be produced across the fet's
drain-source at switch-off. Even if I could somehow clamp the D-S
voltage at the switcher's connection to the PCB board, there would
still be considerable spikes due to the package's own wires (it is a
TO220-5).
Can someone help and tell whether I should bother about these spikes,
and if yes - to which extent? Many thanks!
-- A