# mosfet basic calculations

Discussion in 'Electronics Homework Help' started by KUMARA SHP, Aug 30, 2014.

1. ### KUMARA SHP

122
4
Aug 1, 2014
I am not familiar with mosfet but with biploar
this is my home work question I make it on paint
can you help me to solve this

2. ### KUMARA SHP

122
4
Aug 1, 2014
I need to know what are Id , Idss , Up , & why Id , Idss are minus values

3. ### Laplace

1,252
184
Apr 4, 2010
The interesting thing here is you don't actually need to know anything about FETs in order to solve the problem. But you do need to know which is the gate, drain, and source.

You are given R1 & R2 voltage divider, 12 volts in, 4 volts out. You are given the parallel equivalent resistance of R1||R2 as 79.4kΩ. That is enough to determine the values of R1 and R2.

You are given the drain current of 6mA from which to calculate the gate-source voltage. Then knowing the gate voltage you find the source voltage. The drain current will be the same as the source current, so knowing the source voltage and source current gives you the value of Rs.

You are given the drain-source voltage = -5V, so subtracting that and the source voltage from the supply voltage of 12V gives the voltage across the drain resistance and knowing the drain current gives you the value of Rd.

I suspect that the currents are negative because the supply voltage is negative.
Anyway, that's how I would try to solve it.

4. ### KrisBlueNZSadly passed away in 2015

8,393
1,271
Nov 28, 2011
That circuit symbol is not a MOSFET. It is a JFET. There are important differences.

Also, it is a P-channel JFET so the bottom rail of the circuit is positive and the top rail is negative. This is the reason why voltages and currents are negative. This is implied by the "-E" marking but the other polarity markings on that diagram are either wrong or meaningless.

JFETs are normally "self-biased', with R1 removed. Edit: For some reason, the writer of the question has specified a gate voltage of -4V, so both resistors are required.

The input should be capacitor-coupled, like the output.

You're right that capacitors have no effect on the DC conditions and can be ignored in your calculations.

Start by cleaning up the schematic, including correcting the polarity markings (remove the input and output polarity markings). Then identify the 0V rail and mark all the required voltages according to the operating point specified in the question.

5. ### (*steve*)¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥdModerator

25,497
2,839
Jan 21, 2010
Yeah, 100% in agreement with Kris.

Without an input capacitor, the input voltage source would make R1 and R2 moot.

6. ### KUMARA SHP

122
4
Aug 1, 2014
I got the idea
but what is Up ?

7. ### Laplace

1,252
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Apr 4, 2010
Vp is the pinch-off voltage, the gate reverse voltage sufficient to remove all free charge from the channel.

8. ### KUMARA SHP

122
4
Aug 1, 2014
Idss = 10mA can it happen while Id = 6mA is there mistake ?
my home work book shows that values but I feel I have done mistake ?

9. ### Laplace

1,252
184
Apr 4, 2010
Idss is the saturation drain current with the gate shorted to the source (Vgs=0) so Idss is the maximum current possible.

10. ### (*steve*)¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥdModerator

25,497
2,839
Jan 21, 2010
The channel will open a little more as you forward bias the gate, so Idss is not the absolute max current.

However forward biasing the gate is generally never done, so this is more of a curiosity than a useable feature.