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Micro and ADC

Discussion in 'Electronic Design' started by [email protected], Jan 23, 2013.

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  1. Guest

    Hi,

    I am assigned to layout a mixed signal printed circuit board for the first time. The main chips on the board are as follows

    1. Microprocessor: MSP430F5438AIPZ ; just one on the board

    2. Analog to Digital Converter: ADS1298IPAG; four on the board

    3. Multiplexer : ADG732BSUZ

    The size of the board is approximately : 4.5 inches Long adn 3.5 inches wide

    I started looking into application notes to design the PCB and found that I need to follow rules inorder to get this PCB done. But application notes do not mention issues related with four on board ADCs.

    1. I am looking for a Layer Stack up scheme that can help in

    a. keeping the noise low
    b. low EMC


    2. I need your views about the following layout stack up

    Eight Layer Board:
    Layer1 : Slow Analog Signal ( Only Analog Chips) {Top Layer)
    Layer2: Analog Ground Plane
    Layer3: Power Plane
    Layer4: Analog Signal Routing
    Layer5: Digital Ground Plane
    Layer6: Digital Signal Routing
    Layer7: Analog Ground Plane
    Layer8: Digital Fast Signals ( Only Digital Chips) { Bottom Layer }

    For example, the clock line will go from bottom layer through via and appear next to the ADC's clock pin and will be routed on the Layer 6. So, it will stay between the two Analog Plane Layers. Any comments!

    3. I also read that tight coupling between the layer can also keep the crosstalk to a minimum. The formula 1 / 1+ ( D/H )^2 . Where

    D is the distance between the two traces
    H is the height of the trace above the circuit board.

    Is this true? If yes, than does it mean that I have to keep the width of the prepeg in mind? Should I ask the board manufacturer to use the thinnest prepeg he can use.

    4. The system will run on 16 to 20MHz clock and 16 bits will be used from the 24 bit ADC. The gain on the board is 50. So, according to the following application note

    http://www.ti.com/lit/ml/slyp167/slyp167.pdf

    How can I use this appllication note to design my PCB?

    5. The box for this circuit in made up of plastic and it will be non shieled.


    I think that you guys might say that the frequency is too low for this kind of stack up plane. But this is my first board and I want it to be perfect.

    jess
     
  2. Guest

    Hi,

    I am thinking about keeping the Digital Signals on the Bottom Layer and on Layer6 and through vias will be connected to the ADC's Digital pins. The vias will be very close to the ADC's digital pins. The ADCs are on the top layer.

    I can not change the box, it will be a plastic.

    jess
     
  3. Nico Coesel

    Nico Coesel Guest

    I'd put this design on a 2 layer board. Just optimize parts & pins so
    you can route most signals on the top layer and keep the bottom layer
    as a mostly solid ground plane.

    Placing the parts in a way you don't need vias is the key to a good
    PCB layout.
     
  4. Gufaw..

    All good advice otherwise. I was going to add that looking at the
    signal flow on the schematic can help with the pcb. (provided the
    schematic's not a rat's nest.)
     
  5. Uwe Hercksen

    Uwe Hercksen Guest

    Hello,

    you will get heavy problems in routing the digital signals on one layer
    only, I would recommend at least two layers, one for horizontal traces
    and one for vertical.
    If there are only short and few traces, one layer is possible.

    Bye
     
  6. That makes good sense, but what exactly do you mean by that
    last statement, Tim? Where should the grounds go?

    To the OP:
    A four layer PCB should be enough. Signals on top and bottom,
    one full ground plane and power distribution inside.
    Don't cut up your ground plane, keep the area of loops
    carrying substantial currents small and keep nodes having
    large fast voltage swings small too. Keep sensitive tracks
    away from noisy ones. I they have to get close, put them on
    different layers.

    Keep in mind that copper is no superconductor and that traces
    have inductance too. A trace carrying large currents or fast-
    changing signals does not have the same potential throughout.

    Don't use components, logic or amplifiers, much faster than they
    need to be. Keep impedance of sensitive nodes as low as you can
    get away with. (Those are circuit design issues, which I suppose
    are not in your hands.)

    Jeroen Belleman
     
  7. Guest

    Hi,

    So, it means that the PCB will be fine in both cases. It does not matter if I go with Four Layer board or with 8 layer board with the layer stack scheme that I mentioned in my original post.

    jess
     
  8. Tim Williams

    Tim Williams Guest

    Well, if "does not matter" includes a quadrupled cost.

    Suit yourself...

    Tim
     
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