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Memory capacitors

Discussion in 'Electronic Basics' started by matt, Feb 20, 2006.

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  1. matt

    matt Guest

    What are the general rules of thumb re memory capacitors and voltage
    retention when power is switched off? Is a higher capacitance (ie 10F)
    memory cap going to hold onto data for a lot longer than one rated at

    Also, I assume that a 5.5 volt memory cap can't be used on a 20 year
    old PCB using TTL (which is of course rated to run at a maximum of
    5.25 volts).

  2. matt

    matt Guest


    Oops, I meant hold onto its' rated voltage, ie if it's rated at 2.5
    volts then will it continue to output 2.5 volts for longer the higher
    the capacitance?
  3. Rich Webb

    Rich Webb Guest

    Yes, all other things being equal.

    Also, WRT the "5.5" issue: I'd assume that is the maximum rated voltage
    for that part. If it's connected to a 5 volt rail then it will only
    charge up to 5 V.
  4. John Fields

    John Fields Guest

    For the same current out of both capacitors, yes.

    Sure it can. That 5.5V is the highest voltage to which it can be
    charged, not the voltage to which it _must_ ber charged.

    It'll just discharge a lot more quickly because TTL draws static
    current while CMOS doesn't (well... not much, anyway)
  5. matt

    matt Guest

    That makes sense, cheers. :)
  6. matt

    matt Guest

    So, on an old TTL circuit, how long would a 10F 5.5 Volt retain the
    voltage for? Days? Weeks? Months? Or does it depend on the size of the
    circuit? (It's only being used to retain the data in a 6116 RAM on a
    circuit which also has a dozen TTLs and some EPROMs).
  7. John Fields

    John Fields Guest

    It depends on how much current the circuit draws.

    Think of the capacitor as a container full of water with a spigot on
    the bottom.

    Voltage will be analogous to how high the water is in the container,
    and current will be analogous to how fast the water flows out of the
    spigot, so you can see that if you only open the spigot a little the
    water level will fall slowly, but if you open the spigot a lot, the
    water level will fall more quickly.

    Retaining data in CMOS under static conditions might be the
    equivalent of about a drop of water flowing out of the spigot every
    hour, while for TTL it might be the equivalent of several cups of
    water per minute.

    To determine how long you can retain data in the TTL circuitry you
    need to know how much current the TTL needs to operate, what the
    voltage across the circuitry will be when the power supply quits,
    what the minimum voltage is which will guarantee that the data will
    remain valid, and the value of the capacitor's capacitance.

    Come back with that data and one (or maybe several) of us will show
    you how to figure out how long the cap will allow your TTL circuitry
    to retain data after the power supply goes away.
  8. More capacitance equals slower rate of change of voltage. No
    capacitor holds a steady voltage as current passes through it. The
    relationship (for an ideal capacitor, with no internal resistance) is
    I=C*(dv/dt), with I in amperes, C in farads, and dv/dt in volts per
    A 5.5 volt cap can stand no more than 5.5 volts, but it can certainly
    stand less. The bigger question is how much current does memory
    retention take, That current and the value of capacitance determines
    the rate of change of capacitor voltage.
  9. matt

    matt Guest

    Thanks very much for all the replies, they've been extremely useful.
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