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Memory Bus Design

Discussion in 'Electronic Design' started by Jonas Blick, Dec 20, 2003.

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  1. Jonas Blick

    Jonas Blick Guest

    Hi,

    Got a question, say that you want to connect a Samsung S3C44B0X with
    integrated SDRAM controller
    with one FLASH memory (Bank0/CE0), one SRAM (Bank2/CE2) and one SDRAM
    (Bank6/CE6)

    1. Should every memory have serial resistors on the data lines?
    2. Should there be any termination resistors placed on the bus?
    3. Is there any guidelines regardning connection several types of memories
    to the same bus?
    4. How should the bus be designed ?

    Thanks,
    Jonas
     
  2. Like Dune, Spice is your friend.
    See 1A.
    Read the app notes and see 2A and 1A, above.
    Very well.
     
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