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Memory addressing from MicroP

Discussion in 'Microcontrollers, Programming and IoT' started by dgubber, Mar 25, 2017.

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  1. dgubber

    dgubber

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    Mar 25, 2017
    Can someone please explain why in most schematic examples I've found of Micros such as an ARM Cortex-M0+ the connections to the SDRAM start by connecting A2 from the Micro to A0 on the SDRAM. Why not just A0 <-> A0 ?

    Also - what is so special about A10 on an SDRAM ? ( lol ) It seems to be treated a bit differently.

    This all might be very basic but for some reason it's eluding me...

    Dan
     
  2. Harald Kapp

    Harald Kapp Moderator Moderator

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    Nov 17, 2011
    The cortex M0 is a 32 Bit processor.
    SDRAM is usually organized in 8 bits.
    Addresses in a microprocessor typically are used to address bytes (8 bits)
    Therefore the 2 least significant bits (A0, A1) are used to address bytes 0...3 in any 4 byte (32 bit) word.
    As 4 SDRAMs are used to create one 32 bit word, addresses A0 and A1 can be used to create 4 chip select signals for addressing individual bytes of the 32 bit word, but afaik the SDRAM controller would access all 32 bits since the bus is 32 bit wide. The microcontroller can then internally sort which byte to use.
     
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