Phil Allison said:
"pimpom"
** Err - you just completely changed the nature of your
question.
P.S. voltage is one thing, max Vds of the FET is another.
Why? Since the electret itself is tied to gate and source, the
limiting voltage is the max Vds of the FET. Sure, the load
resistor drops some of the supply voltage, but by how much is not
precisely predictable. The FET charcteristics are unknown; and
even if typical values are given, there are tolerances - often as
much as +/-50% for Idss. Then there's the swing from steady-state
when there's an input. That swing may be of the order of
millivolts under normal signal conditions, but there could be
circumstances, intended or unintended, where the swing is much
more, theoretically up to the P.S. voltage.
The whole point is that there IS a current limiting
esistor - and if the PS voltage goes up, the SO must the
value of that resistor.
In typical applications, yes. But what if I or someone else want
to use the unit in an Atypical application? For example, I may
want to keep circuit component count to a minimum by supplying
the mic directly from a convenient, well filtered supply of +20V,
but, for some reason, also want to keep the load resistor low. Or
even use an inductive load. The max Vds (and possibly
dissipation) rating will then be the ultimate limiting factor.
Plus - what the **** are you on about ????
See above.
Your dopey Q simply has no context.
Just like you.
That was uncalled for. But I'll take it in the spirit of Usenet
and just shrug.