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magnetizing energy in Flyback converter

Discussion in 'Electronic Design' started by webber, Feb 13, 2007.

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  1. webber

    webber Guest

    I have a question about the magnetizing energy changing during the
    transition between the turn off of MSOFET and the turn on of the
    output rectifier.

    When the power MOS is turned on, the input energy is stored into the
    magnetizing inductance, and the current on the inductor increases
    linearly. After the MOS is turned off, the inductor current starts to
    charge the output capacitance of the MOS (Coss), and the Vds voltage
    starts to increase. Once the voltage on the Vds is high enough to let
    the secondary rectifier becomes forward biased, the energy starts to
    transfer to the secondary. And, thing keep happens on the primary side
    is that the energy on the leakage inductor continuous to transfer to
    the Coss and the Vds will increase to high level until the primary
    snubber diode is on.
    The above is my understanding of the flyback converter.

    Based on this understanding, the difference between the energy stored
    in the magnetizing inductor and the left energy in this inductor
    during the period after the MOS is off and the secondary rectifier is
    on, is used to charge the Coss to the point to let the secondary
    rectifier becomes forward biased.

    But, my measured data is quite different.
    The energy difference on the inductor (5.7W) during this small period
    is much larger than the energy transfer to the Coss (0.36W).
    Can anyone tell me what's wrong ??

    Thanks a lot.
  2. The energy stored in the inductor charges all primary and
    secondary capacitances. These include the inter winding
    capacitances of the coils, as well as the mosfet and diode
    capacitances. The MOSFET output capacitance may start out
    as the larges component of the total, but it falls as
    voltage rises, so at peak voltage, it may no longer be dominant.
    Be careful with your units. Watts is unit of power, joules
    is unit of energy. I think you need to find out what the
    other capacitances in the circuit are. And the nonlinearity
    of Coss makes it a bit rough to come up with a precise
    energy stored at any given voltage rise.
  3. Andrew Edge

    Andrew Edge Guest

    The secondary rectifier becomes forward biased because the MOS is off
    which reverses all the voltages on the transformer windings. It is the
    reversed voltage that forward biases the diode. Of course the
    secondary voltage has to be higher then the value on the output
    capacitor for the diode to be forward biased.
    Tell us how did you measure those values .
  4. legg

    legg Guest

    As stated elsewhere, there are other capacitances. Note also that the
    voltage rises as the mosfet current falls. If the transition period is
    long, the fet will be absorbing energy during that time.

    The more common complaint is that leakage energy, that is not
    transferable has significant effects in clamp overshoot and
    dissipation. They're both LI^2 /2, in joules.

  5. Genome

    Genome Guest

    I'm not certain about your explanation of what you are missing in terms of
    where the extra (loss) is from. However Mr Legg mentions energy that is
    stored in the leakage inductance, as LleakIpk^2/2, which ends up being lost
    to the clamp (snubber).

    It is really a clamp because it limits the overvoltage from leakage
    inductance during flyback.

    There is more to it than that though and it's a bit subtle.

    As the leakage inductance is being reset it is sitting on top of the
    reflected secondary voltage. Not only do you get the energy from
    LleakIpk^2/2 dumped into the snubber energy is also removed from that
    reflected voltage.

    Let's say you have a 100uH primary with 10uH leakage inductance and your
    peak primary current is 5 amps. The energy stored in the leakage inductance
    is 125uJ. If your supply is operating at 100KHz then the power in the clamp
    is 12.5W.

    BUT.... If the reflected secondary voltage is 200V and your clamp voltage is
    300V then the leakage inductance is being reset through 100V. That takes
    500nS, T=dIL/V. The current waveform is triangular and you can work out the
    associated charge from its area as being 1.25uC.

    With your supply operating at 100KHz the average current recovered from the
    reflected secondary voltage is that charge multiplied by the frequency or
    125mA. Multiply that by the reflected 200V and you get the additional power
    in the clamp as 25W......... !!!!!!!!!!

    So the actual loss that the clamp has to deal with is not 12.5W it is 37.5W.

    If you don't know about it then you can spend a lot of time scratching your
    head wondering why the resistor in your clamp/snubber is smoking. If you do
    then you can design for it.

    Having minimised leakage inductance the next thing you should do is maximise
    the clamp voltage. That reduces the time taken to reset the leakage
    inductance and the energy lost.

  6. webber

    webber Guest

    Thanks for all your valued input.

    I measure the primary current by a current probe between the Source of
    the MOSFET and the series current sensing resistor.

    When the Vds starts to increase, the primary current is 1.06A. And it
    reduces to 0.83A when Vds reaches 302V to let the secondary rectifier
    start conducting current.
    The magnetizing inductance is 600uH and the leakage inductance is 20uH
    (both measured by LCR meter). And the operating freq. is 60KHz.
    Therefore, the power difference during this period is:
    1/2 * (600+20)*10^(-6)*(1.06^2-0.83^2)*60*10^3=8.09W---(1)
    The Coss of MOSFET is 135pF, which is measured at VDS=25V and
    freq=1MHz. Can anyone tell me how to transfer this data to meet the
    condition that my circuit actually works?
    If I still use this 135pF to calculate, the power would be:
    And the conduction loss during this period (around 400nsec):
    ((1.06 + 0.83)/2) * (302/2)* 40*10^(-9)*60*10*3=0.34W-(3)

    So, where is the difference between (1) - ( (2) + (3) ) = 7.38W

  7. Andrew Edge

    Andrew Edge Guest

    I assume you have no load on otherwise you'd be losing it there.
    You should keep in account your measured values don't take into
    account the spikes in currents and voltages which add considerably to
    Power losses.
    Just taking a rapid look at your calculations. I would think
    subtracting 2*1.06*0.83W in the power expression for primary
    inductance loss would be more accurate as energy remains stored in the
    primary inductances, due to the fact that the current does not drop to
    zero during the transition period.
    What is the gate drive impedance on the MOS? If too high you may have
    a bounce on-off effect during transitions.
    Most losses, generally more then a half are in the diode, so check on
    that too.
    Core losses in the transformer windings , capacitor , error control
    and switching circuitry could account for the difference.

  8. What MOSFET are you using?

    I haven't followed the convoluted arguments being put forth in
    this thread, but I can say I'm uncomfortable with the various
    assumptions being made to allow cranking through some perhaps
    oversimplified formulas. Completely missing circuit elements
    (e.g., core losses, winding capacitances, and continuing
    MOSFET drain-source conduction after supposed "turnoff"), is
    one serious issue. Misuse of "known" parameters is another.

    For example, power MOSFET capacitances are certainly not fixed
    values, as John has pointed out, but instead vary by 10 to 40x
    over the full operating range. The datasheet specs and plots
    are nice to have, but I've found substantial variation in bench
    measurements of actual parts against the datasheet values,
    which can exceed 3x under some circumstances. I'm convinced
    that datasheet plots are sometimes either oversimplifications
    intended to convey a concept rather reality, or figments of a
    draftsman's mind. For example, actual MOSFETs often show a
    dramatic change in capacitance, 2x to even 5x over a few volts,
    somewhere in the 7 to 12V region. This effect is completely
    absent from the manufacturer's plots for the same part. My
    favorite RCA engineering MOSFET model (a low-voltage MOSFET
    in cascode with a high-voltage depletion-mode JFET) accurately
    handles this dramatic condition, but that model does not lend
    itself well to the classic parameters we see on the datasheet.

    My suggestion is that you take a suite of bench measurements
    on your components before attempting to accurately model and
    calculate the power losses. You'll need specialized test jigs
    to accurately measure some of the more difficult things, like
    delayed incomplete MOSFET turnoff as a function of say gate
    drive, drain current and time.

    Good luck. Let us know what you learn.
  9. legg

    legg Guest

    'reset'ing the leakage inductance is an interesting use of terms.

    The dI/dt in the leakage inductance is seen by the clamp rectifier.
    The higher the dI/dt in this part, the higher the peak reverse current
    spike in this rectifier before it turns off. As the total reverse
    charge increases with both peak forward current and reversing dI/dT,
    you are working with some interesting relationships which can result
    in more reverse recovery charge than initial forward charge transfer -
    effectively 'regulating' the clamp voltage without appreciable
    dissipation in the clamp bleeder.

    This is possibly why Power Integrations specifies an ancient and only
    moderately fast rectifier in this position, in most of their
    application circuits. Crunching the numbers using their recommended
    bleeder resistor values reveals quite low power levels being
    anticipated for dissipation, despite calculably higher potential
    losses when the 'ideal' parasite leakage term gets to work.

    If you ignore the noise consequences, and the intentional stress of
    the appreciably higher clamp voltages (ameliorated somewhat by PI's
    intentional use of IET continuous current topologies), it's an
    interesting and cheap technique - but only, in my opinion, if you know
    you're doing it. Otherwise it's just plain fool's liuck.

  10. legg

    legg Guest


    Your circuit will either work, or not, in spite of the accuracy of
    your calculations - not because of it.

  11. Terry Given

    Terry Given Guest


    well put.

    then suitable measurements can tell you whats really happening, and can
    be used to verify (or falsify) your calculations.

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